{name: "FCTIDZ", argLength: 1, reg: fp11, asm: "FCTIDZ", typ: "Float64"}, // convert float to 64-bit int round towards zero
		{name: "FCTIWZ", argLength: 1, reg: fp11, asm: "FCTIWZ", typ: "Float64"}, // convert float to 32-bit int round towards zero
		{name: "FCFID", argLength: 1, reg: fp11, asm: "FCFID", typ: "Float64"},   // convert 64-bit integer to float

		{name: "FCVTSD", argLength: 1, reg: fp11, asm: "FCVTSD"},     // float32 -> float64
		{name: "FCVTDS", argLength: 1, reg: fp11, asm: "FCVTDS"},     // float64 -> float32

		// floating-point round to integral
		{name: "FRINTAD", argLength: 1, reg: fp11, asm: "FRINTAD"},
		{name: "FRINTMD", argLength: 1, reg: fp11, asm: "FRINTMD"},
		{name: "FRINTND", argLength: 1, reg: fp11, asm: "FRINTND"},

			inputs: []inputInfo{
				{0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
				{1, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
				{2, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
			},
			outputs: []outputInfo{
				{0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
			},
		},
	},
	{
		name:         "MULAD",

	MOVD	F3, (19*8)(R25)
	MOVD	F4, (20*8)(R25)
	MOVD	F5, (21*8)(R25)
	MOVD	F6, (22*8)(R25)
	MOVD	F7, (23*8)(R25)
	MOVD	F8, (24*8)(R25)
	MOVD	F9, (25*8)(R25)
	MOVD	F10, (26*8)(R25)
	MOVD	F11, (27*8)(R25)
	MOVD	F12, (28*8)(R25)
	MOVD	F13, (29*8)(R25)
	MOVD	F14, (30*8)(R25)
	MOVD	F15, (31*8)(R25)
	RET

// unspillArgs loads args into registers from a *internal/abi.RegArgs in R25.

	FMOVD   F3, 112(R20)
	FMOVD   F4, 120(R20)
	FMOVD   F5, 128(R20)
	FMOVD   F6, 136(R20)
	FMOVD   F7, 144(R20)
	FMOVD   F8, 152(R20)
	FMOVD   F9, 160(R20)
	FMOVD   F10, 168(R20)
	FMOVD   F11, 176(R20)
	FMOVD   F12, 184(R20)
	RET

// unspillArgs loads args into registers from a *internal/abi.RegArgs in R20.
TEXT runtime·unspillArgs(SB),NOSPLIT,$0-0
	MOVD    0(R20), R3
	MOVD    8(R20), R4