// Test all escapes
    assertEquals(
        "a&quot;b&lt;c&gt;d&amp;e&quot;f&apos;", xmlAttributeEscaper.escape("a\"b<c>d&e\"f'"));
    // Test '\t', '\n' and '\r' are escaped.
    assertEquals("a&#x9;b&#xA;c&#xD;d", xmlAttributeEscaper.escape("a\tb\nc\rd"));
  }

  // Helper to assert common properties of xml escapers.
  static void assertBasicXmlEscaper(

	CANDI	$31, X10				// 7d89

	// 26.5.3: Compressed Integer Register-Register Operations
	CMV	X6, X5					// 9a82
	CADD	X9, X8					// 2694
	CAND	X9, X8					// 658c
	COR	X9, X8					// 458c
	CXOR	X9, X8					// 258c
	CSUB	X9, X8					// 058c
	CADDW	X9, X8					// 259c
	CSUBW	X9, X8					// 059c

	// 26.5.5: Compressed NOP Instruction
	CNOP						// 0100

	// 26.5.6: Compressed Breakpoint Instruction

MOVOU bswapMask<>+0(SB), X0 MOVQ SI, X1 PINSRQ $0x01, DI, X1 MOVAPS X1, X8 PSHUFB X0, X1 MOVQ SI, R8 ADDQ $0x07, R8 JC ctr8_slow XORQ R8, R8 INCQ R8 PXOR X9, X9 PINSRQ $0x00, R8, X9 PADDQ X9, X8 MOVAPS X8, X2 PADDQ X9, X8 MOVAPS X8, X3 PADDQ X9, X8 MOVAPS X8, X4 PADDQ X9, X8 MOVAPS X8, X5 PADDQ X9, X8 MOVAPS X8, X6 PADDQ X9, X8 MOVAPS X8, X7 PADDQ X9, X8 MOVAPS X8, X8 JMP ctr8_done ctr8_slow: ADDQ $0x01, SI ADCQ $0x00, DI MOVQ SI, X2 PINSRQ $0x01, DI, X2 ADDQ $0x01, SI ADCQ $0x00, DI MOVQ SI, X3 PINSRQ...

	VMOVQ		R4, V3.B[1]     // 8384eb72
	VMOVQ		R5, V4.B[3]     // a48ceb72
	VMOVQ		R6, V5.H[2]     // c5c8eb72
	VMOVQ		R7, V6.W[2]     // e6e8eb72
	VMOVQ		R8, V7.V[1]     // 07f5eb72
	XVMOVQ		R7, X9.W[2]     // e9c8eb76
	XVMOVQ		R8, X10.V[2]    // 0ae9eb76

	// Duplicate general-purpose register to vector
	VMOVQ		R4, V2.B16      // 82009f72
	VMOVQ		R5, V3.H8       // a3049f72
	VMOVQ		R6, V4.W4       // c4089f72