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Results 1 - 4 of 4 for SUBW (0.07 sec)

  1. src/crypto/aes/block.go

    	nk := len(key) / 4
    	for i = 0; i < nk; i++ {
    		enc[i] = byteorder.BeUint32(key[4*i:])
    	}
    	for ; i < len(enc); i++ {
    		t := enc[i-1]
    		if i%nk == 0 {
    			t = subw(rotw(t)) ^ (uint32(powx[i/nk-1]) << 24)
    		} else if nk > 6 && i%nk == 4 {
    			t = subw(t)
    		}
    		enc[i] = enc[i-nk] ^ t
    	}
    
    	// Derive decryption key from encryption key.
    	// Reverse the 4-word round key sets from enc to produce dec.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 13 18:57:38 UTC 2024
    - 6.4K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/loong64/anames.go

    	"NOR",
    	"OR",
    	"REM",
    	"REMU",
    	"RFE",
    	"SC",
    	"SCV",
    	"SGT",
    	"SGTU",
    	"SLL",
    	"SQRTD",
    	"SQRTF",
    	"SRA",
    	"SRL",
    	"ROTR",
    	"SUB",
    	"SUBD",
    	"SUBF",
    	"SUBU",
    	"SUBW",
    	"DBAR",
    	"SYSCALL",
    	"TEQ",
    	"TNE",
    	"WORD",
    	"XOR",
    	"MASKEQZ",
    	"MASKNEZ",
    	"MOVV",
    	"MOVVL",
    	"MOVVR",
    	"SLLV",
    	"SRAV",
    	"SRLV",
    	"ROTRV",
    	"DIVV",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 1.9K bytes
    - Viewed (0)
  3. src/runtime/asm_arm64.s

    	VEOR	V0.B16, V2.B16, V0.B16
    	VEOR	V4.B16, V6.B16, V4.B16
    	VEOR	V4.B16, V0.B16, V0.B16
    
    	VMOV	V0.D[0], R0
    	RET
    
    TEXT runtime·procyield(SB),NOSPLIT,$0-0
    	MOVWU	cycles+0(FP), R0
    again:
    	YIELD
    	SUBW	$1, R0
    	CBNZ	R0, again
    	RET
    
    // Save state of caller into g->sched,
    // but using fake PC from systemstack_switch.
    // Must only be called from functions with no locals ($0)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 20:38:24 UTC 2024
    - 43.4K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/opGen.go

    			},
    			outputs: []outputInfo{
    				{0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30
    			},
    		},
    	},
    	{
    		name:   "SUBW",
    		argLen: 2,
    		asm:    riscv.ASUBW,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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