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Results 1 - 6 of 6 for PPC64 (0.05 sec)

  1. src/cmd/asm/internal/arch/arch.go

    		register[obj.Rconv(i)] = int16(i)
    	}
    	for i := ppc64.REG_CR0; i <= ppc64.REG_CR7; i++ {
    		register[obj.Rconv(i)] = int16(i)
    	}
    	for i := ppc64.REG_MSR; i <= ppc64.REG_CR; i++ {
    		register[obj.Rconv(i)] = int16(i)
    	}
    	for i := ppc64.REG_CR0LT; i <= ppc64.REG_CR7SO; i++ {
    		register[obj.Rconv(i)] = int16(i)
    	}
    	register["CR"] = ppc64.REG_CR
    	register["XER"] = ppc64.REG_XER
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Nov 13 12:17:37 UTC 2025
    - 21.7K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/asm.go

    		} else {
    			p.branch(targetAddr, targetProg)
    		}
    	case target.Type == obj.TYPE_MEM && target.Name == obj.NAME_NONE:
    		// JMP 4(R0)
    		*targetAddr = *target
    		// On the ppc64, 9a encodes BR (CTR) as BR CTR. We do the same.
    		if p.arch.Family == sys.PPC64 && target.Offset == 0 {
    			targetAddr.Type = obj.TYPE_REG
    		}
    	case target.Type == obj.TYPE_CONST:
    		// JMP $4
    		*targetAddr = a[0]
    	case target.Type == obj.TYPE_NONE:
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Tue Oct 21 15:13:08 UTC 2025
    - 26.7K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/endtoend_test.go

    	for _, goppc64 := range []int{8, 9, 10} {
    		t.Logf("GOPPC64=power%d", goppc64)
    		buildcfg.GOPPC64 = goppc64
    		// Some pseudo-ops may assemble differently depending on GOPPC64
    		testEndToEnd(t, "ppc64", "ppc64")
    		testEndToEnd(t, "ppc64", "ppc64_p10")
    	}
    }
    
    func testRISCV64AllProfiles(t *testing.T, testFn func(t *testing.T)) {
    	t.Helper()
    
    	defer func(orig int) { buildcfg.GORISCV64 = orig }(buildcfg.GORISCV64)
    
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Tue Dec 23 18:45:48 UTC 2025
    - 12.5K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/parse.go

    				return
    			}
    			a.Type = obj.TYPE_REGREG
    			a.Offset = int64(r2)
    			// Nothing may follow
    			return
    		}
    		if p.arch.Family == sys.PPC64 {
    			// Special form for PPC64: (R1+R2); alias for (R1)(R2).
    			if prefix != 0 || scale != 0 {
    				p.errorf("illegal address mode for register+register")
    				return
    			}
    			a.Type = obj.TYPE_MEM
    			a.Scale = 0
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Wed Nov 12 03:59:40 UTC 2025
    - 37.3K bytes
    - Viewed (0)
  5. doc/asm.html

    </ul>
    
    <p>
    Reference: <a href="/pkg/cmd/internal/obj/arm64">Go ARM64 Assembly Instructions Reference Manual</a>
    </p>
    
    <h3 id="ppc64">PPC64</h3>
    
    <p>
    This assembler is used by GOARCH values ppc64 and ppc64le.
    </p>
    
    <p>
    Reference: <a href="/pkg/cmd/internal/obj/ppc64">Go PPC64 Assembly Instructions Reference Manual</a>
    </p>
    
    <h3 id="s390x">IBM z/Architecture, a.k.a. s390x</h3>
    
    <p>
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Fri Nov 14 19:09:46 UTC 2025
    - 36.5K bytes
    - Viewed (0)
  6. lib/fips140/v1.1.0-rc1.zip

    //go:noescape func expandKeyAsm(nr int, key *byte, enc *uint32, dec *uint32) var supportsAES = cpu.X86HasAES && cpu.X86HasSSE41 && cpu.X86HasSSSE3 || cpu.ARM64HasAES || cpu.PPC64 || cpu.PPC64le func init() { if cpu.AMD64 { impl.Register("aes", "AES-NI", &supportsAES) } if cpu.ARM64 { impl.Register("aes", "Armv8.0", &supportsAES) } if cpu.PPC64 || cpu.PPC64le { // The POWER architecture doesn't have a way to turn off AES support // at runtime with GODEBUG=cpu.something=off, so introduce a new GODEBUG // knob...
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Dec 11 16:27:41 UTC 2025
    - 663K bytes
    - Viewed (0)
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