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Results 1 - 3 of 3 for JC (0.65 sec)

  1. src/cmd/asm/internal/arch/arch.go

    	instructions["JA"] = x86.AJHI   /* alternate */
    	instructions["JAE"] = x86.AJCC  /* alternate */
    	instructions["JB"] = x86.AJCS   /* alternate */
    	instructions["JBE"] = x86.AJLS  /* alternate */
    	instructions["JC"] = x86.AJCS   /* alternate */
    	instructions["JCC"] = x86.AJCC  /* carry clear (CF = 0) */
    	instructions["JCS"] = x86.AJCS  /* carry set (CF = 1) */
    	instructions["JE"] = x86.AJEQ   /* alternate */
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Nov 13 12:17:37 UTC 2025
    - 21.7K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/arm64.s

    	DC	CVADP, R27                         // 3b7d0bd5
    
    // Branch Target Identification
    	BTI	C                                  // 5f2403d5
    	BTI	J                                  // 9f2403d5
    	BTI	JC                                 // df2403d5
    
    // Pointer Authentication Codes (PAC)
    	PACIASP                                    // 3f2303d5
    	AUTIASP                                    // bf2303d5
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Mon Nov 10 17:34:13 UTC 2025
    - 96.1K bytes
    - Viewed (0)
  3. lib/fips140/v1.1.0-rc1.zip

    ·ctrBlocks8Asm(SB), $0-48 MOVQ nr+0(FP), AX MOVQ xk+8(FP), CX MOVQ dst+16(FP), DX MOVQ src+24(FP), BX MOVQ ivlo+32(FP), SI MOVQ ivhi+40(FP), DI MOVOU bswapMask<>+0(SB), X0 MOVQ SI, X1 PINSRQ $0x01, DI, X1 MOVAPS X1, X8 PSHUFB X0, X1 MOVQ SI, R8 ADDQ $0x07, R8 JC ctr8_slow XORQ R8, R8 INCQ R8 PXOR X9, X9 PINSRQ $0x00, R8, X9 PADDQ X9, X8 MOVAPS X8, X2 PADDQ X9, X8 MOVAPS X8, X3 PADDQ X9, X8 MOVAPS X8, X4 PADDQ X9, X8 MOVAPS X8, X5 PADDQ X9, X8 MOVAPS X8, X6 PADDQ X9, X8 MOVAPS X8, X7 PADDQ X9, X8 MOVAPS X8,...
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Dec 11 16:27:41 UTC 2025
    - 663K bytes
    - Viewed (0)
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