FNMADDCC F1, F2, F3, F4         // fc8110ff
	FNMADDS F1, F2, F3, F4          // ec8110fe
	FNMADDSCC F1, F2, F3, F4        // ec8110ff
	FNMSUB F1, F2, F3, F4           // fc8110fc
	FNMSUBCC F1, F2, F3, F4         // fc8110fd
	FNMSUBS F1, F2, F3, F4          // ec8110fc
	FNMSUBSCC F1, F2, F3, F4        // ec8110fd
	FSEL F1, F2, F3, F4             // fc8110ee
	FSELCC F1, F2, F3, F4           // fc8110ef
	FABS F1, F2                     // fc400a10

	DIVF	F0, F1, F2    // 002a81ee
	DIVD.EQ	F3, F4, F5    // 035b840e
	DIVF.NE	F0, F2        // 002a821e
	DIVD	F3, F5        // 035b85ee
	NEGF	F0, F1        // 401ab1ee
	NEGD	F4, F5        // 445bb1ee
	ABSF	F0, F1        // c01ab0ee
	ABSD	F4, F5        // c45bb0ee
	SQRTF	F0, F1        // c01ab1ee
	SQRTD	F4, F5        // c45bb1ee
	MOVFD	F0, F1        // c01ab7ee
	MOVDF	F4, F5        // c45bb7ee

	LDREX	(R8), R9      // 9f9f98e1

	MOVFD	F4, F5			// 85241901
	MOVDF	F4, F5			// 85181901
	MOVWF	F4, F5			// 85101d01
	MOVFW	F4, F5			// 85041b01
	MOVWD	F4, F5			// 85201d01
	MOVDW	F4, F5			// 85081b01
	NEGF	F4, F5			// 85141401
	NEGD	F4, F5			// 85181401
	ABSD	F4, F5			// 85081401
	TRUNCDW	F4, F5			// 85881a01
	TRUNCFW	F4, F5			// 85841a01
	SQRTF	F4, F5			// 85441401
	SQRTD	F4, F5			// 85481401

	FMVXS	F0, X5					// d30200e0
	FMVSX	X5, F0					// 538002f0
	FMVXW	F0, X5					// d30200e0
	FMVWX	X5, F0					// 538002f0
	FMADDS	F1, F2, F3, F4				// 43822018
	FMSUBS	F1, F2, F3, F4				// 47822018
	FNMSUBS	F1, F2, F3, F4				// 4b822018
	FNMADDS	F1, F2, F3, F4				// 4f822018

	// 20.8: Single-Precision Floating-Point Compare Instructions
	FEQS	F0, F1, X7				// d3a300a0
	FLTS	F0, F1, X7				// d39300a0

	FMADD	F1, F1, F1             // b31e1011
	FMADDS	F1, F2, F3             // b30e3012
	FMSUB	F4, F5, F5             // b31f5045
	FMSUBS	F6, F6, F7             // b30f7066
	LPDFR	F1, F2                 // b3700021
	LNDFR	F3, F4                 // b3710043
	CPSDR	F5, F6, F7             // b3725076
	LTEBR	F1, F2                 // b3020021
	LTDBR	F3, F4                 // b3120043
	TCEB	F5, $8                 // ed5000080010

    assertEscaping(e, "%EF%BF%BF", '\uffff'); // xxx-1111,x-111111,x-11,1111
    assertUnicodeEscaping(e, "%F0%90%80%80", '\uD800', '\uDC00');
    assertUnicodeEscaping(e, "%F4%8F%BF%BF", '\uDBFF', '\uDFFF');

    assertEquals("", e.escape(""));
    assertEquals("safestring", e.escape("safestring"));
    assertEquals("embedded%00null", e.escape("embedded\0null"));

    assertEscaping(e, "%EF%BF%BF", '\uffff'); // xxx-1111,x-111111,x-11,1111
    assertUnicodeEscaping(e, "%F0%90%80%80", '\uD800', '\uDC00');
    assertUnicodeEscaping(e, "%F4%8F%BF%BF", '\uDBFF', '\uDFFF');

    // simple string tests
    assertEquals("", e.escape(""));
    assertEquals("safestring", e.escape("safestring"));
    assertEquals("embedded%00null", e.escape("embedded\0null"));

    assertEscaping(e, "%EF%BF%BF", '\uffff'); // xxx-1111,x-111111,x-11,1111
    assertUnicodeEscaping(e, "%F0%90%80%80", '\uD800', '\uDC00');
    assertUnicodeEscaping(e, "%F4%8F%BF%BF", '\uDBFF', '\uDFFF');

    assertEquals("", e.escape(""));
    assertEquals("safestring", e.escape("safestring"));
    assertEquals("embedded%00null", e.escape("embedded\0null"));

    assertEscaping(e, "%EF%BF%BF", '\uffff'); // xxx-1111,x-111111,x-11,1111
    assertUnicodeEscaping(e, "%F0%90%80%80", '\uD800', '\uDC00');
    assertUnicodeEscaping(e, "%F4%8F%BF%BF", '\uDBFF', '\uDFFF');

    // simple string tests
    assertEquals("", e.escape(""));
    assertEquals("safestring", e.escape("safestring"));
    assertEquals("embedded%00null", e.escape("embedded\0null"));

	MOVW	R1, (F0)           // ERROR "illegal base register"
	MOVB	R2, (F0)           // ERROR "illegal base register"
	MOVH	R3, (F0)           // ERROR "illegal base register"
	MOVF	F4, (F0)           // ERROR "illegal base register"
	MOVD	F5, (F0)           // ERROR "illegal base register"
	MOVM.IA	(F1), [R0-R4]      // ERROR "illegal base register"
	MOVM.DA	(F1), [R0-R4]      // ERROR "illegal base register"