Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 2 of 2 for DIVW (0.08 sec)

  2. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/loong64enc1.s 

    	REMU	R4, R5	   		// a5902100
	REMU	R4, R5, R6	   	// a6902100
	REMWU	R4, R5	   		// a5902100
	REMWU	R4, R5, R6	   	// a6902100
	DIV	R4, R5	  		// a5102000
	DIV	R4, R5, R6	  	// a6102000
	DIVW	R4, R5	  		// a5102000
	DIVW	R4, R5, R6	  	// a6102000
	DIVU	R4, R5	   		// a5102100
	DIVU	R4, R5, R6	   	// a6102100
	DIVWU	R4, R5	   		// a5102100
	DIVWU	R4, R5, R6	   	// a6102100
	SRLV	R4, R5 			// a5101900
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Nov 27 00:46:52 UTC 2025
    - 44.5K bytes
    - Viewed (0)
  3. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/riscv64.s 

    	MULW	X5, X6, X7				// bb035302

	// 13.2: Division Operations
	DIV	X5, X6, X7				// b3435302
	DIVU	X5, X6, X7				// b3535302
	REM	X5, X6, X7				// b3635302
	REMU	X5, X6, X7				// b3735302
	DIVW	X5, X6, X7				// bb435302
	DIVUW	X5, X6, X7				// bb535302
	REMW	X5, X6, X7				// bb635302
	REMUW	X5, X6, X7				// bb735302

	// 14.2: Load-Reserved/Store-Conditional (Zalrsc)
	LRW	(X5), X6				// 2fa30214
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Nov 13 12:17:37 UTC 2025
    - 73.7K bytes
    - Viewed (0)
Back to top