- Sort Score
- Result 10 results
- Languages All
Results 1 - 5 of 5 for BLT (1.07 sec)
-
src/cmd/asm/internal/asm/testdata/ppc64.s
BLE CR4,0(PC) // 40910000 BLE CR6, LR // 4c990020 BLT 0(PC) // 41800000 BLT CR5,0(PC) // 41940000 BNE 0(PC) // 40820000 BNE CR6, LR // 4c9a0020 BLT CR6,0(PC) // 41980000 BLT CR6, LR // 4d980020 BVC 0(PC) // 40830000
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Oct 29 13:14:38 UTC 2024 - 51K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arm.go
"BNE": true, "BCS": true, "BHS": true, "BCC": true, "BLO": true, "BMI": true, "BPL": true, "BVS": true, "BVC": true, "BHI": true, "BLS": true, "BGE": true, "BLT": true, "BGT": true, "BLE": true, "CALL": true, "JMP": true, } func jumpArm(word string) bool { return armJump[word] } // IsARMCMP reports whether the op (as defined by an arm.A* constant) is
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Wed Oct 23 15:18:14 UTC 2024 - 6.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
// 2.5: Control Transfer Instructions JAL X5, 2(PC) // ef028000 JALR X6, (X5) // 67830200 JALR X6, 4(X5) // 67834200 BEQ X5, X6, 2(PC) // 63846200 BNE X5, X6, 2(PC) // 63946200 BLT X5, X6, 2(PC) // 63c46200 BLTU X5, X6, 2(PC) // 63e46200 BGE X5, X6, 2(PC) // 63d46200 BGEU X5, X6, 2(PC) // 63f46200 // 2.6: Load and Store Instructions LW (X5), X6 // 03a30200
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Fri Oct 25 12:05:29 UTC 2024 - 16.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/s390x.s
SPM R1 // 0410 SPM R10 // 04a0 BRC $7, 0(PC) // a7740000 BNE 0(PC) // a7740000 BEQ 0(PC) // a7840000 BLT 0(PC) // a7440000 BLE 0(PC) // a7c40000 BGT 0(PC) // a7240000 BGE 0(PC) // a7a40000 BLTU 0(PC) // a7540000
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Wed Sep 18 15:49:24 UTC 2024 - 22.1K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arch.go
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Thu Oct 24 12:32:56 UTC 2024 - 21.5K bytes - Viewed (0)