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Results 1 - 4 of 4 for ACLZ (0.07 sec)

  1. src/cmd/internal/obj/loong64/a.out.go

    	AABSF
    	AADD
    	AADDD
    	AADDF
    	AADDU
    
    	AADDW
    	AAND
    	ABEQ
    	ABGEZ
    	ABLEZ
    	ABGTZ
    	ABLTZ
    	ABFPF
    	ABFPT
    
    	ABNE
    	ABREAK
    	ACLO
    	ACLZ
    
    	ACMPEQD
    	ACMPEQF
    
    	ACMPGED // ACMPGED -> fcmp.sle.d
    	ACMPGEF // ACMPGEF -> fcmp.sle.s
    	ACMPGTD // ACMPGTD -> fcmp.slt.d
    	ACMPGTF // ACMPGTF -> fcmp.slt.s
    
    	ALU12IW
    	ALU32ID
    	ALU52ID
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 5.7K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/loong64/asm.go

    			obj.APCALIGN,
    			obj.APCDATA,
    			obj.ADUFFZERO,
    			obj.ADUFFCOPY:
    			break
    
    		case ARDTIMELW:
    			opset(ARDTIMEHW, r0)
    			opset(ARDTIMED, r0)
    
    		case ACLO:
    			opset(ACLZ, r0)
    
    		case ATEQ:
    			opset(ATNE, r0)
    
    		case AMASKEQZ:
    			opset(AMASKNEZ, r0)
    
    		case ANOOP:
    			opset(obj.AUNDEF, r0)
    
    		case AAMSWAPW:
    			for i := range atomicInst {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 61.8K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/arm64/asm7.go

    			oprangeset(ALSR, t)
    			oprangeset(ALSRW, t)
    			oprangeset(AASR, t)
    			oprangeset(AASRW, t)
    			oprangeset(AROR, t)
    			oprangeset(ARORW, t)
    
    		case ACLS:
    			oprangeset(ACLSW, t)
    			oprangeset(ACLZ, t)
    			oprangeset(ACLZW, t)
    			oprangeset(ARBIT, t)
    			oprangeset(ARBITW, t)
    			oprangeset(AREV, t)
    			oprangeset(AREVW, t)
    			oprangeset(AREV16, t)
    			oprangeset(AREV16W, t)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 15:44:14 UTC 2024
    - 201.1K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/opGen.go

    			},
    			outputs: []outputInfo{
    				{0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
    			},
    		},
    	},
    	{
    		name:   "CLZ",
    		argLen: 1,
    		asm:    arm.ACLZ,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 22527}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 g R12 R14
    			},
    			outputs: []outputInfo{
    				{0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
    			},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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