VMOVHPD 7(DX), X8, X8            // c539164207 or 6271bd28168207000000 or 6271bd48168207000000
	VMOVHPD -15(R11)(CX*1), X8, X8   // c4413916440bf1 or 6251bd2816840bf1ffffff or 6251bd4816840bf1ffffff
	VMOVHPD (SP)(AX*2), X8, X8       // c539160444 or 6271bd28160444 or 6271bd48160444
	VMOVHPD (AX), X20, X8            // 6271dd001600 or 6271dd201600 or 6271dd401600

	CANDI	$31, X10				// 7d89

	// 26.5.3: Compressed Integer Register-Register Operations
	CMV	X6, X5					// 9a82
	CADD	X9, X8					// 2694
	CAND	X9, X8					// 658c
	COR	X9, X8					// 458c
	CXOR	X9, X8					// 258c
	CSUB	X9, X8					// 058c
	CADDW	X9, X8					// 259c
	CSUBW	X9, X8					// 059c

	// 26.5.5: Compressed NOP Instruction
	CNOP						// 0100

	// 26.5.6: Compressed Breakpoint Instruction

ivlo+32(FP), SI MOVQ ivhi+40(FP), DI MOVOU bswapMask<>+0(SB), X0 MOVQ SI, X1 PINSRQ $0x01, DI, X1 MOVAPS X1, X8 PSHUFB X0, X1 MOVQ SI, R8 ADDQ $0x07, R8 JC ctr8_slow XORQ R8, R8 INCQ R8 PXOR X9, X9 PINSRQ $0x00, R8, X9 PADDQ X9, X8 MOVAPS X8, X2 PADDQ X9, X8 MOVAPS X8, X3 PADDQ X9, X8 MOVAPS X8, X4 PADDQ X9, X8 MOVAPS X8, X5 PADDQ X9, X8 MOVAPS X8, X6 PADDQ X9, X8 MOVAPS X8, X7 PADDQ X9, X8 MOVAPS X8, X8 JMP ctr8_done ctr8_slow: ADDQ $0x01, SI ADCQ $0x00, DI MOVQ SI, X2 PINSRQ $0x01, DI, X2 ADDQ $0x01, SI...

X11, X8 MOVOU X14, X11 PCLMULQDQ $0x01, X8, X11 PSHUFD $0x4e, X8, X8 PXOR X11, X8 MOVOU X14, X11 PCLMULQDQ $0x01, X8, X11 PSHUFD $0x4e, X8, X8 PXOR X11, X8 PXOR X9, X8 PSHUFB X15, X8 PXOR X13, X8 MOVOU X8, (DX) RET DATA bswapMask<>+0(SB)/8, $0x08090a0b0c0d0e0f DATA bswapMask<>+8(SB)/8, $0x0001020304050607 GLOBL bswapMask<>(SB), RODATA|NOPTR, $16 DATA gcmPoly<>+0(SB)/8, $0x0000000000000001 DATA gcmPoly<>+8(SB)/8, $0xc200000000000000 GLOBL gcmPoly<>(SB), RODATA|NOPTR, $16 // func gcmAesInit(productTable...

    return retVal;
  }

  private enum SmallEnum {
    X0,
    X1,
    X2
  }

  private enum MediumEnum {
    X0,
    X1,
    X2,
    X3,
    X4,
    X5,
    X6,
    X7,
    X8,
    X9,
    X10,
    X11,
    X12,
    X13,
    X14,
    X15,
    X16,
    X17,
    X18,
    X19,
    X20,
    X21,
    X22,
    X23,
    X24,
    X25,

	CMV	F1, X5					// ERROR "expected integer register in rs2"
	CMV	X5, F1					// ERROR "expected integer register in rd"
	CADD	X5, X6, X7				// ERROR "rd must be the same as rs1"
	CADD	X0, X8					// ERROR "cannot use register X0 in rs2"
	CADD	X8, X0					// ERROR "cannot use register X0 in rd"
	CAND	X10, X11, X12				// ERROR "rd must be the same as rs1"
	CAND	X5, X11					// ERROR "expected integer prime register in rs2"

	VMOVQ		V10.HU[2], R6   // 46c9f372
	VMOVQ		V11.WU[2], R7   // 67e9f372
	VMOVQ		V31.VU[1], R8   // e8f7f372
	XVMOVQ		X1.W[2], R7     // 27c8ef76
	XVMOVQ		X6.V[2], R8     // c8e8ef76
	XVMOVQ		X8.WU[2], R7    // 07c9f376
	XVMOVQ		X31.VU[2], R8   // e8ebf376

	// Move general-purpose register to a vector element: VMOVQ  Rn, <Vd>.<T>[index]
	VMOVQ		R4, V2.B[0]     // 8280eb72
	VMOVQ		R4, V3.B[1]     // 8384eb72

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