R15, AX RORXL $0x02, R9, R12 VPSHUFB shuff_DC00<>+0(SB), Y11, Y11 VPADDD Y0, Y11, Y4 XORL R12, R14 MOVL R9, R12 ANDL R11, R12 ORL R12, DI ADDL R14, DX ADDL R15, DX ADDL DI, DX // Do 4 rounds and scheduling VPADDD 32(BP)(SI*1), Y5, Y9 VMOVDQU Y9, 32(SP)(SI*1) MOVL DX, DI RORXL $0x19, AX, R13 RORXL $0x0b, AX, R14 ADDL 32(SP)(SI*1), R8 ORL R10, DI VPALIGNR $0x04, Y7, Y4, Y0 MOVL BX, R15 RORXL $0x0d, DX, R12 XORL R14, R13 XORL CX, R15 VPADDD Y5, Y0, Y0 RORXL $0x06, AX, R14 ANDL AX, R15 XORL R14, R13 RORXL...