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Results 1 - 7 of 7 for R12 (0.04 sec)

  2. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/loong64enc1.s 

    	AMORW		R14, (R13), R12 // ac396338
	AMORV		R14, (R13), R12 // acb96338
	AMXORW		R14, (R13), R12 // ac396438
	AMXORV		R14, (R13), R12 // acb96438
	AMMAXW		R14, (R13), R12 // ac396538
	AMMAXV		R14, (R13), R12 // acb96538
	AMMINW		R14, (R13), R12 // ac396638
	AMMINV		R14, (R13), R12 // acb96638
	AMMAXWU		R14, (R13), R12 // ac396738
	AMMAXVU		R14, (R13), R12 // acb96738
	AMMINWU		R14, (R13), R12 // ac396838
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Thu Sep 04 19:24:25 UTC 2025
    - 35.5K bytes
    - Viewed (0)
  3. github.com/golang/go

    lib/fips140/v1.0.0.zip 

    (CX), X0 MOVL 12(CX), R10 MOVOU (AX), X11 MOVL 12(AX), R12 BSWAPL R10 BSWAPL R12 PXOR X0, X11 MOVOU X11, (SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 12(SP) CMPQ R9, $0x80 JB gcmAesDecSingles MOVOU X11, 16(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 28(SP) MOVOU X11, 32(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 44(SP) MOVOU X11, 48(SP) ADDL $0x01, R10 MOVL R10, R11 XORL R12, R11 BSWAPL R11 MOVL R11, 60(SP) MOVOU X11, 64(SP)...
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Jan 29 15:10:35 UTC 2025
    - 635K bytes
    - Viewed (0)
  4. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/arm64.s 

    	ADD	R2.SXTX<<1, RSP, RSP            // ffe7228b
	ADD	ZR.SXTX<<1, R2, R3              // 43e43f8b
	ADDW	R2.SXTW, R10, R12               // 4cc1220b
	ADD	R19.UXTX, R14, R17              // d161338b
	ADDSW	R19.UXTW, R14, R17              // d141332b
	ADDS	R12.SXTX, R3, R1                // 61e02cab
	SUB	R19.UXTH<<4, R2, R21            // 553033cb
	SUBW	R1.UXTX<<1, R3, R2              // 6264214b
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Mar 26 10:48:50 UTC 2025
    - 95.3K bytes
    - Viewed (0)
  5. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/s390x.s 

    	LAAG	R4, R5, -524288(R6)   // eb54600080e8
	LAAL	R7, R8, 8192(R9)      // eb87900002fa
	LAALG	R10, R11, -8192(R12)  // ebbac000feea
	LAN	R1, R2, (R3)          // eb21300000f4
	LANG	R4, R5, (R6)          // eb54600000e4
	LAX	R7, R8, (R9)          // eb87900000f7
	LAXG	R10, R11, (R12)       // ebbac00000e7
	LAO	R1, R2, (R3)          // eb21300000f6
	LAOG	R4, R5, (R6)          // eb54600000e6
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Jul 30 19:29:15 UTC 2025
    - 22.9K bytes
    - Viewed (0)
  6. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/armv6.s 

    	SQRTF	F0, F1        // c01ab1ee
	SQRTD	F4, F5        // c45bb1ee
	MOVFD	F0, F1        // c01ab7ee
	MOVDF	F4, F5        // c45bb7ee

	LDREX	(R8), R9      // 9f9f98e1
	LDREXB	(R11), R12    // 9fcfdbe1
	LDREXD	(R11), R12    // 9fcfbbe1
	STREX	R3, (R4), R5  // STREX  (R4), R3, R5 // 935f84e1
	STREXB	R8, (R9), g   // STREXB (R9), R8, g  // 98afc9e1
	STREXD	R8, (R9), g   // STREXD (R9), R8, g  // 98afa9e1
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Oct 23 15:18:14 UTC 2024
    - 4.7K bytes
    - Viewed (0)
  7. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/amd64enc_extra.s 

    	VPGATHERQQ X0, 16(SP)(X1*1), X2         // c4e2f991540c10
	VPGATHERQQ X0, 512(SP)(X1*1), X2        // c4e2f991940c00020000
	VPGATHERQQ X0, (R12)(X1*1), X2          // c4c2f991140c
	VPGATHERQQ X0, 16(R12)(X1*1), X2        // c4c2f991540c10
	VPGATHERQQ X0, 512(R12)(X1*1), X2       // c4c2f991940c00020000
	VPGATHERQQ X0, (BP)(X1*1), X2           // c4e2f991540d00
	VPGATHERQQ X0, 16(BP)(X1*1), X2         // c4e2f991540d10
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Thu Feb 20 11:20:03 UTC 2025
    - 57.7K bytes
    - Viewed (0)
  8. github.com/golang/go

    doc/asm.html 

    <code>&gt;&gt;</code> (logical right shift), and
<code>@&gt;</code> (rotate right).

</li>

<li>
<code>[R0,g,R12-R15]</code>: For multi-register instructions, the set comprising
<code>R0</code>, <code>g</code>, and <code>R12</code> through <code>R15</code> inclusive.
</li>

<li>
<code>(R5, R6)</code>: Destination register pair.
</li>

</ul>
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue Nov 28 19:15:27 UTC 2023
    - 36.3K bytes
    - Viewed (0)
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