- Sort Score
- Result 10 results
- Languages All
Results 1 - 5 of 5 for PCALIGN (0.07 sec)
-
src/cmd/asm/internal/asm/asm.go
} p.append(prog, "", true) } // asmPCAlign assembles a PCALIGN pseudo-op. // PCALIGN $16 func (p *Parser) asmPCAlign(operands [][]lex.Token) { if len(operands) != 1 { p.errorf("expect one operand for PCALIGN") return } // Operand 0 must be an immediate constant. key := p.address(operands[0]) if !p.validImmediate("PCALIGN", &key) { return } prog := &obj.Prog{ Ctxt: p.ctxt,
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Aug 05 17:31:25 UTC 2025 - 26.2K bytes - Viewed (0) -
doc/asm.html
<p> The <code>PCALIGN</code> pseudo-instruction is used to indicate that the next instruction should be aligned to a specified boundary by padding with no-op instructions. </p> <p> It is currently supported on arm64, amd64, ppc64, loong64 and riscv64. For example, the start of the <code>MOVD</code> instruction below is aligned to 32 bytes: <pre> PCALIGN $32 MOVD $2, R0 </pre> </p>
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Nov 28 19:15:27 UTC 2023 - 36.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
MOVD XER, 4(R1) // 7fe102a6fbe10004 MOVD 4(R1), SPR(3) // ebe100047fe303a6 MOVD 4(R1), XER // ebe100047fe103a6 OR $0, R0, R0 // 60000000 PCALIGN $16 PNOP // 0700000000000000 SETB CR1,R3 // 7c640100 VCLZLSBB V1,R2 // 10400e02 VCTZLSBB V1,R2 // 10410e02
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Thu Nov 21 18:27:17 UTC 2024 - 51.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/parse.go
switch word { case "DATA": p.asmData(operands) case "FUNCDATA": p.asmFuncData(operands) case "GLOBL": p.asmGlobl(operands) case "PCDATA": p.asmPCData(operands) case "PCALIGN": p.asmPCAlign(operands) case "TEXT": p.asmText(operands) default: return false } return true } // symDefRef scans a line for potential text symbol definitions and
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Fri Feb 14 15:13:11 UTC 2025 - 37.3K bytes - Viewed (0) -
lib/fips140/v1.0.0.zip
and set loop count in CTR. LOAD_KEY(KEYP) SRD $4, LEN MOVD LEN, CTR BEQ Lcbc_dec PCALIGN $16 Lcbc_enc: P8_LXVB16X(INP, R0, INOUT) ADD $16, INP VXOR INOUT, V6, INOUT CIPHER_BLOCK(INOUT, IVEC, INOUT, VCIPHER, VCIPHERLAST, Lcbc_enc10, Lcbc_enc12) VOR INOUT, INOUT, IVEC // ciphertext (INOUT) is IVEC for next block. P8_STXVB16X(INOUT, OUTP, R0) ADD $16, OUTP BDNZ Lcbc_enc P8_STXVB16X(INOUT, IVP, R0) CLEAR_KEYS() RET PCALIGN $16 Lcbc_dec: P8_LXVB16X(INP, R0, TMP) ADD $16, INP CIPHER_BLOCK(TMP, V6, INOUT,...
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jan 29 15:10:35 UTC 2025 - 635K bytes - Viewed (0)