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Results 1 - 9 of 9 for LessThanU (0.2 sec)
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src/cmd/compile/internal/ssa/_gen/ARM64latelower.rules
// Boolean-generating instructions (NOTE: NOT all boolean Values) always // zero upper bit of the register; no need to zero-extend (MOVBUreg x:((Equal|NotEqual|LessThan|LessThanU|LessThanF|LessEqual|LessEqualU|LessEqualF|GreaterThan|GreaterThanU|GreaterThanF|GreaterEqual|GreaterEqualU|GreaterEqualF) _)) => x // omit unsigned extension (MOVWUreg x) && zeroUpper32Bits(x, 3) => x
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 4.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64.rules
(Leq(8U|16U|32U|64U) (MOVDconst [1]) x) => (Neq(8|16|32|64) (MOVDconst [0]) x) (Less8U x y) => (LessThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) (Less16U x y) => (LessThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) (Less32U x y) => (LessThanU (CMPW x y)) (Less64U x y) => (LessThanU (CMP x y)) (Leq8 x y) => (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM.rules
(Less32 x y) => (LessThan (CMP x y)) (Less(32|64)F x y) => (GreaterThan (CMP(F|D) y x)) // reverse operands to work around NaN (Less8U x y) => (LessThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y))) (Less16U x y) => (LessThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y))) (Less32U x y) => (LessThanU (CMP x y)) (Leq8 x y) => (LessEqual (CMP (SignExt8to32 x) (SignExt8to32 y))) (Leq16 x y) => (LessEqual (CMP (SignExt16to32 x) (SignExt16to32 y)))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 90.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64latelower.go
return true } // match: (MOVBUreg x:(LessThan _)) // result: x for { x := v_0 if x.Op != OpARM64LessThan { break } v.copyOf(x) return true } // match: (MOVBUreg x:(LessThanU _)) // result: x for { x := v_0 if x.Op != OpARM64LessThanU { break } v.copyOf(x) return true } // match: (MOVBUreg x:(LessThanF _)) // result: x for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 19.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
{name: "FRINTPD", argLength: 1, reg: fp11, asm: "FRINTPD"}, {name: "FRINTZD", argLength: 1, reg: fp11, asm: "FRINTZD"}, // conditional instructions; auxint is // one of the arm64 comparison pseudo-ops (LessThan, LessThanU, etc.) {name: "CSEL", argLength: 3, reg: gp2flags1, asm: "CSEL", aux: "CCop"}, // auxint(flags) ? arg0 : arg1 {name: "CSEL0", argLength: 2, reg: gp1flags1, asm: "CSEL", aux: "CCop"}, // auxint(flags) ? arg0 : 0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARMOps.go
{name: "GreaterThan", argLength: 1, reg: readflags}, // bool, true flags encode signed x>y false otherwise. {name: "GreaterEqual", argLength: 1, reg: readflags}, // bool, true flags encode signed x>=y false otherwise. {name: "LessThanU", argLength: 1, reg: readflags}, // bool, true flags encode unsigned x<y false otherwise. {name: "LessEqualU", argLength: 1, reg: readflags}, // bool, true flags encode unsigned x<=y false otherwise.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 41K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64.go
v_0 := v.Args[0] // match: (LessThanU (FlagConstant [fc])) // result: (MOVDconst [b2i(fc.ult())]) for { if v_0.Op != OpARM64FlagConstant { break } fc := auxIntToFlagConstant(v_0.AuxInt) v.reset(OpARM64MOVDconst) v.AuxInt = int64ToAuxInt(b2i(fc.ult())) return true } // match: (LessThanU (InvertFlags x)) // result: (GreaterThanU x) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 608.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM.go
v_0 := v.Args[0] // match: (LessThanU (FlagConstant [fc])) // result: (MOVWconst [b2i32(fc.ult())]) for { if v_0.Op != OpARMFlagConstant { break } fc := auxIntToFlagConstant(v_0.AuxInt) v.reset(OpARMMOVWconst) v.AuxInt = int32ToAuxInt(b2i32(fc.ult())) return true } // match: (LessThanU (InvertFlags x)) // result: (GreaterThanU x) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 486.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
{ name: "GreaterEqual", argLen: 1, reg: regInfo{ outputs: []outputInfo{ {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 }, }, }, { name: "LessThanU", argLen: 1, reg: regInfo{ outputs: []outputInfo{ {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 }, }, }, { name: "LessEqualU", argLen: 1,
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)