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Results 1 - 10 of 65 for intconst (0.16 sec)

  1. src/cmd/compile/internal/rangefunc/rewrite.go

    	var thenList []syntax.Stmt
    	if zeroNext {
    		clr := &syntax.AssignStmt{
    			Lhs: r.next(),
    			Rhs: r.intConst(0),
    		}
    		thenList = append(thenList, clr)
    	}
    	for _, then := range thens {
    		thenList = append(thenList, then)
    	}
    	nif := &syntax.IfStmt{
    		Cond: r.cond(op, r.next(), r.intConst(c)),
    		Then: &syntax.BlockStmt{
    			List: thenList,
    		},
    	}
    	return nif
    }
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 01:05:44 UTC 2024
    - 41.6K bytes
    - Viewed (0)
  2. src/runtime/asm_wasm.s

    	I64Const $8
    	Call	gcWriteBarrier<>(SB)
    	Return
    TEXT runtime·gcWriteBarrier2<ABIInternal>(SB),NOSPLIT,$0
    	I64Const $16
    	Call	gcWriteBarrier<>(SB)
    	Return
    TEXT runtime·gcWriteBarrier3<ABIInternal>(SB),NOSPLIT,$0
    	I64Const $24
    	Call	gcWriteBarrier<>(SB)
    	Return
    TEXT runtime·gcWriteBarrier4<ABIInternal>(SB),NOSPLIT,$0
    	I64Const $32
    	Call	gcWriteBarrier<>(SB)
    	Return
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 21:26:51 UTC 2023
    - 11.8K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/MIPS64.rules

    (SGTconst [c] (MOVBUreg _)) && 0xff < c => (MOVVconst [1])
    (SGTconst [c] (MOVBUreg _)) && c < 0 => (MOVVconst [0])
    (SGTUconst [c] (MOVBUreg _)) && 0xff < uint64(c) => (MOVVconst [1])
    (SGTconst [c] (MOVHreg _)) && 0x7fff < c => (MOVVconst [1])
    (SGTconst [c] (MOVHreg _)) && c <= -0x8000 => (MOVVconst [0])
    (SGTconst [c] (MOVHUreg _)) && 0xffff < c => (MOVVconst [1])
    (SGTconst [c] (MOVHUreg _)) && c < 0 => (MOVVconst [0])
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jul 31 03:59:48 UTC 2023
    - 41.9K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/LOONG64.rules

    (SGTconst [c] (MOVBUreg _)) && 0xff < c => (MOVVconst [1])
    (SGTconst [c] (MOVBUreg _)) && c < 0 => (MOVVconst [0])
    (SGTUconst [c] (MOVBUreg _)) && 0xff < uint64(c) => (MOVVconst [1])
    (SGTconst [c] (MOVHreg _)) && 0x7fff < c => (MOVVconst [1])
    (SGTconst [c] (MOVHreg _)) && c <= -0x8000 => (MOVVconst [0])
    (SGTconst [c] (MOVHUreg _)) && 0xffff < c => (MOVVconst [1])
    (SGTconst [c] (MOVHUreg _)) && c < 0 => (MOVVconst [0])
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 19:26:25 UTC 2023
    - 31.8K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/ARM64.rules

    (ANDconst [c] (MOVDconst [d]))  => (MOVDconst [c&d])
    (ANDconst [c] (ANDconst [d] x)) => (ANDconst [c&d] x)
    (ANDconst [c] (MOVWUreg x)) => (ANDconst [c&(1<<32-1)] x)
    (ANDconst [c] (MOVHUreg x)) => (ANDconst [c&(1<<16-1)] x)
    (ANDconst [c] (MOVBUreg x)) => (ANDconst [c&(1<<8-1)] x)
    (MOVWUreg (ANDconst [c] x)) => (ANDconst [c&(1<<32-1)] x)
    (MOVHUreg (ANDconst [c] x)) => (ANDconst [c&(1<<16-1)] x)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 113.1K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/_gen/ARM.rules

    (MOVHUreg x:(MOVHUload _ _)) => (MOVWreg x)
    
    // fold extensions and ANDs together
    (MOVBUreg (ANDconst [c] x)) => (ANDconst [c&0xff] x)
    (MOVHUreg (ANDconst [c] x)) => (ANDconst [c&0xffff] x)
    (MOVBreg (ANDconst [c] x)) && c & 0x80 == 0 => (ANDconst [c&0x7f] x)
    (MOVHreg (ANDconst [c] x)) && c & 0x8000 == 0 => (ANDconst [c&0x7fff] x)
    
    // fold double extensions
    (MOVBreg x:(MOVBreg _)) => (MOVWreg x)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 90.1K bytes
    - Viewed (0)
  7. src/math/big/intconv.go

    cui fliter <******@****.***> 1697288956 +0800
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 11:59:09 UTC 2023
    - 6.7K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/_gen/ARM64latelower.rules

    (SUBconst [c] x) && !isARM64addcon(c)  => (SUB x (MOVDconst [c]))
    (ANDconst [c] x) && !isARM64bitcon(uint64(c)) => (AND x (MOVDconst [c]))
    (ORconst  [c] x) && !isARM64bitcon(uint64(c))  => (OR  x (MOVDconst [c]))
    (XORconst [c] x) && !isARM64bitcon(uint64(c))  => (XOR x (MOVDconst [c]))
    (TSTconst [c] x) && !isARM64bitcon(uint64(c))  => (TST x (MOVDconst [c]))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 4.1K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/staticinit/sched.go

    	}
    	newList := make([]ir.Node, 0, need)
    	for i := 0; i < len(s); i++ {
    		if ir.IsConst(s[i], constant.String) && i+1 < len(s) && ir.IsConst(s[i+1], constant.String) {
    			// merge from i up to but not including i2
    			var strs []string
    			i2 := i
    			for i2 < len(s) && ir.IsConst(s[i2], constant.String) {
    				strs = append(strs, ir.StringVal(s[i2]))
    				i2++
    			}
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 02 17:16:14 UTC 2024
    - 30.7K bytes
    - Viewed (0)
  10. test/codegen/strings.go

    	//  wasm:`I64Const\t\$12592`,`I64Store16\t\$0`,`I64Const\t\$50`,`I64Store8\t\$2`
    	// mips64:`MOVV\t\$48`,`MOVV\t\$49`,`MOVV\t\$50`
    	bsink = []byte("012")
    
    	// 858927408 = 0x33323130
    	//     13620 = 0x3534
    	// amd64:`MOVL\t\$858927408`,`MOVW\t\$13620, 4\(`
    	//   386:`MOVL\t\$858927408`,`MOVW\t\$13620, 4\(`
    	// arm64:`MOVD\t\$858927408`,`MOVD\t\$13620`
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Jul 26 17:17:28 UTC 2023
    - 2.4K bytes
    - Viewed (0)
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