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Results 1 - 10 of 48 for cmpb (0.28 sec)

  1. src/internal/bytealg/count_ppc64x.s

    #else
    tail:	// Count the last 0 - 31 bytes.
    	CMP	R4, $16
    	BLT	tail_8
    	MOVD	(R3), R12
    	MOVD	8(R3), R14
    	CMPB	R12, R5, R12
    	CMPB	R14, R5, R14
    	POPCNTD	R12, R12
    	POPCNTD	R14, R14
    	ADD	R12, R18, R18
    	ADD	R14, R18, R18
    	ADD	$16, R3, R3
    	ADD	$-16, R4, R4
    
    tail_8:	// Count the remaining 0 - 15 bytes.
    	CMP	R4, $8
    	BLT	tail_4
    	MOVD	(R3), R12
    	CMPB	R12, R5, R12
    	POPCNTD	R12, R12
    	ADD	R12, R18, R18
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Aug 14 20:30:44 UTC 2023
    - 3.6K bytes
    - Viewed (0)
  2. src/internal/bytealg/equal_amd64.s

    //   b in DI
    //   count in BX
    // Output:
    //   result in AX
    TEXT memeqbody<>(SB),NOSPLIT,$0-0
    	CMPQ	BX, $8
    	JB	small
    	CMPQ	BX, $64
    	JB	bigloop
    #ifndef hasAVX2
    	CMPB	internal∕cpu·X86+const_offsetX86HasAVX2(SB), $1
    	JE	hugeloop_avx2
    
    	// 64 bytes at a time using xmm registers
    	PCALIGN $16
    hugeloop:
    	CMPQ	BX, $64
    	JB	bigloop
    	MOVOU	(SI), X0
    	MOVOU	(DI), X1
    	MOVOU	16(SI), X2
    	MOVOU	16(DI), X3
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Nov 17 16:34:40 UTC 2023
    - 2.8K bytes
    - Viewed (0)
  3. src/internal/bytealg/count_amd64.s

    #include "textflag.h"
    
    TEXT ·Count(SB),NOSPLIT,$0-40
    #ifndef hasPOPCNT
    	CMPB	internal∕cpu·X86+const_offsetX86HasPOPCNT(SB), $1
    	JEQ	2(PC)
    	JMP	·countGeneric(SB)
    #endif
    	MOVQ	b_base+0(FP), SI
    	MOVQ	b_len+8(FP), BX
    	MOVB	c+24(FP), AL
    	LEAQ	ret+32(FP), R8
    	JMP	countbody<>(SB)
    
    TEXT ·CountString(SB),NOSPLIT,$0-32
    #ifndef hasPOPCNT
    	CMPB	internal∕cpu·X86+const_offsetX86HasPOPCNT(SB), $1
    	JEQ	2(PC)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Oct 06 20:54:43 UTC 2023
    - 4.7K bytes
    - Viewed (0)
  4. src/internal/bytealg/indexbyte_amd64.s

    	MOVQ	DX, (R8)
    	RET
    
    avx2:
    #ifndef hasAVX2
    	CMPB   internal∕cpu·X86+const_offsetX86HasAVX2(SB), $1
    	JNE sse
    #endif
    	MOVD AX, X0
    	LEAQ -32(SI)(BX*1), R11
    	VPBROADCASTB  X0, Y1
    
    	PCALIGN $32
    avx2_loop:
    	VMOVDQU (DI), Y2
    	VPCMPEQB Y1, Y2, Y3
    	VPTEST Y3, Y3
    	JNZ avx2success
    	ADDQ $32, DI
    	CMPQ DI, R11
    	JLT avx2_loop
    	MOVQ R11, DI
    	VMOVDQU (DI), Y2
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Nov 01 19:06:01 UTC 2023
    - 3.1K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/ppc64/anames.go

    	"FRIZ",
    	"FRIZCC",
    	"FRIN",
    	"FRINCC",
    	"FRSQRTE",
    	"FRSQRTECC",
    	"FSEL",
    	"FSELCC",
    	"FSQRT",
    	"FSQRTCC",
    	"FSQRTS",
    	"FSQRTSCC",
    	"CNTLZD",
    	"CNTLZDCC",
    	"CMPW",
    	"CMPWU",
    	"CMPB",
    	"FTDIV",
    	"FTSQRT",
    	"DIVD",
    	"DIVDCC",
    	"DIVDE",
    	"DIVDECC",
    	"DIVDEU",
    	"DIVDEUCC",
    	"DIVDVCC",
    	"DIVDV",
    	"DIVDU",
    	"DIVDUCC",
    	"DIVDUVCC",
    	"DIVDUV",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 6.7K bytes
    - Viewed (0)
  6. test/codegen/switch.go

    // See issue 53333.
    func mimetype(ext string) string {
    	// amd64: `CMPB\s1\(.*\), \$104$`,-`cmpstring`
    	// arm64: `MOVB\s1\(R.*\), R.*$`, `CMPW\s\$104, R.*$`, -`cmpstring`
    	switch ext {
    	// amd64: `CMPL\s\(.*\), \$1836345390$`
    	// arm64: `MOVD\s\$1836345390`, `CMPW\sR.*, R.*$`
    	case ".htm":
    		return "A"
    	// amd64: `CMPL\s\(.*\), \$1953457454$`
    	// arm64: `MOVD\s\$1953457454`, `CMPW\sR.*, R.*$`
    	case ".eot":
    		return "B"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Oct 09 18:39:50 UTC 2023
    - 3.6K bytes
    - Viewed (0)
  7. src/runtime/memmove_test.go

    		for x := 0; x <= size-n; x = x*7 + 1 { // offset in src
    			for y := 0; y <= size-n; y = y*9 + 1 { // offset in dst
    				copy(dst[y:y+n], src[x:x+n])
    				copyref(ref[y:y+n], src[x:x+n])
    				p := cmpb(dst, ref)
    				if p >= 0 {
    					t.Fatalf("Copy failed, copying from src[%d:%d] to dst[%d:%d].\nOffset %d is different, %v != %v", x, x+n, y, y+n, p, dst[p], ref[p])
    				}
    			}
    		}
    	}
    }
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 29 16:41:12 UTC 2024
    - 21.2K bytes
    - Viewed (0)
  8. src/cmd/objdump/objdump_test.go

    	"jmp",
    	"callq",
    	"cmpb",
    }
    
    var i386GnuNeed = []string{
    	"jmp",
    	"call",
    	"cmp",
    }
    
    var armNeed = []string{
    	"B main.main(SB)",
    	"BL main.Println(SB)",
    	"RET",
    }
    
    var arm64Need = []string{
    	"JMP main.main(SB)",
    	"CALL main.Println(SB)",
    	"RET",
    }
    
    var armGnuNeed = []string{ // for both ARM and AMR64
    	"ldr",
    	"bl",
    	"cmp",
    }
    
    var ppcNeed = []string{
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Feb 21 22:16:54 UTC 2024
    - 8.9K bytes
    - Viewed (0)
  9. src/runtime/asm_386.s

    	MOVL	$1, 0(SP)
    	CALL	runtime·exit(SB)
    	CALL	runtime·abort(SB)
    
    has_cpuid:
    	MOVL	$0, AX
    	CPUID
    	MOVL	AX, SI
    	CMPL	AX, $0
    	JE	nocpuinfo
    
    	CMPL	BX, $0x756E6547  // "Genu"
    	JNE	notintel
    	CMPL	DX, $0x49656E69  // "ineI"
    	JNE	notintel
    	CMPL	CX, $0x6C65746E  // "ntel"
    	JNE	notintel
    	MOVB	$1, runtime·isIntel(SB)
    notintel:
    
    	// Load EAX=1 cpuid flags
    	MOVL	$1, AX
    	CPUID
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 15 15:45:13 UTC 2024
    - 43.1K bytes
    - Viewed (0)
  10. src/runtime/asm_amd64.s

    	MOVQ	SP, (g_stack+stack_hi)(DI)
    
    	// find out information about the processor we're on
    	MOVL	$0, AX
    	CPUID
    	CMPL	AX, $0
    	JE	nocpuinfo
    
    	CMPL	BX, $0x756E6547  // "Genu"
    	JNE	notintel
    	CMPL	DX, $0x49656E69  // "ineI"
    	JNE	notintel
    	CMPL	CX, $0x6C65746E  // "ntel"
    	JNE	notintel
    	MOVB	$1, runtime·isIntel(SB)
    
    notintel:
    	// Load EAX=1 cpuid flags
    	MOVL	$1, AX
    	CPUID
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 20:38:24 UTC 2024
    - 60.4K bytes
    - Viewed (0)
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