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src/cmd/asm/internal/asm/testdata/amd64enc_extra.s
VPGATHERDQ Y0, 664(X4*8), Y6 // c4e2fd9034e598020000 VPGATHERDQ Y0, 8(X14*1), Y6 // c4a2fd90343508000000 VPGATHERDQ Y0, -8(X14*1), Y6 // c4a2fd903435f8ffffff VPGATHERDQ Y0, 0(X14*1), Y6 // c4a2fd90343500000000 VPGATHERDQ Y0, 664(X14*1), Y6 // c4a2fd90343598020000 VPGATHERDQ Y0, 8(X14*8), Y6 // c4a2fd9034f508000000
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Thu Feb 20 11:20:03 UTC 2025 - 57.7K bytes - Viewed (0) -
lib/fips140/v1.0.0.zip
p256ord<>+0x00(SB), (const0, const1) LDP p256ord<>+0x10(SB), (const2, const3) LDP 0*16(a_ptr), (x0, x1) LDP 1*16(a_ptr), (x2, x3) LDP 0*16(b_ptr), (y0, y1) LDP 1*16(b_ptr), (y2, y3) // y[0] * x MUL y0, x0, acc0 UMULH y0, x0, acc1 MUL y0, x1, t0 ADDS t0, acc1 UMULH y0, x1, acc2 MUL y0, x2, t0 ADCS t0, acc2 UMULH y0, x2, acc3 MUL y0, x3, t0 ADCS t0, acc3 UMULH y0, x3, acc4 ADC $0, acc4 // First reduction step MUL acc0, hlp1, hlp0 MUL const0, hlp1, t0 ADDS t0, acc0, acc0 UMULH const0, hlp0, t1 MUL const1,...
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jan 29 15:10:35 UTC 2025 - 635K bytes - Viewed (0)