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Results 1 - 10 of 17 for SUBW (0.03 sec)
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src/cmd/asm/internal/asm/testdata/s390x.s
SUBC R1, R2 // b90b0021 SUBC $1, R1, R2 // ec21ffff00db SUBC R2, R3, R4 // b9eb2043 SUBW R3, R4 // 1b43 SUBW R3, R4, R5 // b9f93054 SUBW $8192, R1 // c21500002000 SUBW $8192, R1, R2 // 1821c22500002000 MULLW R6, R7 // b91c0076 MULLW R6, R7, R8 // b9040087b91c0086
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 22 03:55:32 UTC 2023 - 21.6K bytes - Viewed (0) -
src/crypto/aes/block.go
nk := len(key) / 4 for i = 0; i < nk; i++ { enc[i] = byteorder.BeUint32(key[4*i:]) } for ; i < len(enc); i++ { t := enc[i-1] if i%nk == 0 { t = subw(rotw(t)) ^ (uint32(powx[i/nk-1]) << 24) } else if nk > 6 && i%nk == 4 { t = subw(t) } enc[i] = enc[i-nk] ^ t } // Derive decryption key from encryption key. // Reverse the 4-word round key sets from enc to produce dec.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 13 18:57:38 UTC 2024 - 6.4K bytes - Viewed (0) -
src/cmd/internal/obj/mips/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 1.4K bytes - Viewed (0) -
src/cmd/internal/obj/riscv/anames.go
"LW", "LWU", "LH", "LHU", "LB", "LBU", "SW", "SH", "SB", "FENCE", "FENCETSO", "PAUSE", "ADDIW", "SLLIW", "SRLIW", "SRAIW", "ADDW", "SLLW", "SRLW", "SUBW", "SRAW", "LD", "SD", "MUL", "MULH", "MULHU", "MULHSU", "MULW", "DIV", "DIVU", "REM", "REMU", "DIVW", "DIVUW", "REMW", "REMUW", "LRD", "SCD", "LRW",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 20 14:19:33 UTC 2024 - 2.9K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 1.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
SLLW X5, X6, X7 // bb135300 SRLW X5, X6, X7 // bb535300 SUBW X5, X6, X7 // bb035340 SRAW X5, X6, X7 // bb535340 ADDIW $1, X6 // 1b031300 SLLIW $1, X6 // 1b131300 SRLIW $1, X6 // 1b531300 SRAIW $1, X6 // 1b531340 ADDW X5, X7 // bb835300 SLLW X5, X7 // bb935300 SRLW X5, X7 // bbd35300 SUBW X5, X7 // bb835340 SRAW X5, X7 // bbd35340
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 22 04:42:21 UTC 2024 - 16.7K bytes - Viewed (0) -
src/cmd/internal/obj/s390x/anames.go
"ADDW", "DIVW", "DIVWU", "DIVD", "DIVDU", "MODW", "MODWU", "MODD", "MODDU", "MULLW", "MULLD", "MULHD", "MULHDU", "MLGR", "SUB", "SUBC", "SUBV", "SUBE", "SUBW", "NEG", "NEGW", "MOVWBR", "MOVB", "MOVBZ", "MOVH", "MOVHBR", "MOVHZ", "MOVW", "MOVWZ", "MOVD", "MOVDBR", "MOVDEQ", "MOVDGE", "MOVDGT", "MOVDLE", "MOVDLT",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Sep 05 16:41:03 UTC 2023 - 7.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390X.rules
(ADDW x (MOVDconst [c])) => (ADDWconst [int32(c)] x) (SUB x (MOVDconst [c])) && is32Bit(c) => (SUBconst x [int32(c)]) (SUB (MOVDconst [c]) x) && is32Bit(c) => (NEG (SUBconst <v.Type> x [int32(c)])) (SUBW x (MOVDconst [c])) => (SUBWconst x [int32(c)]) (SUBW (MOVDconst [c]) x) => (NEGW (SUBWconst <v.Type> x [int32(c)])) (MULLD x (MOVDconst [c])) && is32Bit(c) => (MULLDconst [int32(c)] x) (MULLW x (MOVDconst [c])) => (MULLWconst [int32(c)] x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 12 18:09:26 UTC 2023 - 74.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/RISCV64.rules
(SUB <t> (MOVDconst [val]) y) && is32Bit(-val) => (NEG (ADDI <t> [-val] y)) // Subtraction of zero. (SUB x (MOVDconst [0])) => x (SUBW x (MOVDconst [0])) => (ADDIW [0] x) // Subtraction from zero. (SUB (MOVDconst [0]) x) => (NEG x) (SUBW (MOVDconst [0]) x) => (NEGW x) // Fold negation into subtraction. (NEG (SUB x y)) => (SUB y x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 40.3K bytes - Viewed (0)