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Results 1 - 4 of 4 for SRR (0.07 sec)

  1. staging/src/k8s.io/apiserver/pkg/util/flowcontrol/gen_test.go

    	if testDebugLogs {
    Registered: Sat Jun 15 01:39:40 UTC 2024
    - Last Modified: Mon Oct 30 12:18:40 UTC 2023
    - 24.8K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/ARM.rules

    (CMP (MOVWconst [c]) x) => (InvertFlags (CMPconst [c] x))
    (CMN x (MOVWconst [c])) => (CMNconst [c] x)
    (TST x (MOVWconst [c])) => (TSTconst [c] x)
    (TEQ x (MOVWconst [c])) => (TEQconst [c] x)
    
    (SRR x (MOVWconst [c])) => (SRRconst x [c&31])
    
    // Canonicalize the order of arguments to comparisons - helps with CSE.
    (CMP x y) && canonLessThan(x,y) => (InvertFlags (CMP y x))
    
    // don't extend after proper load
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 90.1K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/rewriteARM.go

    		v.AddArg(x)
    		return true
    	}
    	return false
    }
    func rewriteValueARM_OpARMSRR(v *Value) bool {
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	// match: (SRR x (MOVWconst [c]))
    	// result: (SRRconst x [c&31])
    	for {
    		x := v_0
    		if v_1.Op != OpARMMOVWconst {
    			break
    		}
    		c := auxIntToInt32(v_1.AuxInt)
    		v.reset(OpARMSRRconst)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 486.8K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/opGen.go

    				{0, 22527}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 g R12 R14
    			},
    			outputs: []outputInfo{
    				{0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
    			},
    		},
    	},
    	{
    		name:   "SRR",
    		argLen: 2,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 22527}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 g R12 R14
    				{1, 22527}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 g R12 R14
    			},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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