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Results 1 - 10 of 30 for MOVWZ (0.08 sec)

  1. src/hash/crc32/crc32_ppc64le.s

    	SLD	$2,R19,R19	// p[5]*4:1
    	MOVWZ	(R10)(R18),R22	// tab[1][p[6]]
    	ADD	$1024,R10,R10	// tab[2]
    	XOR	R21,R22,R21	// xor done R22
    	CLRLSLDI $56,R9,$2,R20
    	MOVWZ	(R10)(R19),R23	// tab[2][p[5]]
    	ADD	$1024,R10,R10	// &tab[3]
    	XOR	R21,R23,R21	// xor done R23
    	MOVWZ	(R10)(R20),R24	// tab[3][p[4]]
    	ADD 	$1024,R10,R10   // &tab[4]
    	XOR	R21,R24,R21	// xor done R24
    	MOVWZ	(R10)(R8),R25	// tab[4][crc>>24]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 06 12:09:50 UTC 2024
    - 13.1K bytes
    - Viewed (0)
  2. src/crypto/md5/md5block_s390x.s

    	ROUND1(R3,R4,R5,R2, 0,0x49b40821,22);
    
    	MOVWBR	(1*4)(R6), R8
    	MOVWZ	R5, R9
    	MOVWZ	R5, R1
    
    #define ROUND2(a, b, c, d, index, const, shift) \
    	XOR	$0xffffffff, R9; \ // NOTW R9
    	ADD	$const, a; \
    	ADD	R8, a; \
    	MOVWBR	(index*4)(R6), R8; \
    	AND	b, R1; \
    	AND	c, R9; \
    	OR	R9, R1; \
    	MOVWZ	c, R9; \
    	ADD	R1, a; \
    	MOVWZ	c, R1; \
    	RLL	$shift,	a; \
    	ADD	b, a
    
    	ROUND2(R2,R3,R4,R5, 6,0xf61e2562, 5);
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 4.4K bytes
    - Viewed (0)
  3. src/crypto/md5/md5block_ppc64x.s

    	ADD	b, a;
    
    
    TEXT ·block(SB),NOSPLIT,$0-32
    	MOVD	dig+0(FP), R10
    	MOVD	p+8(FP), R6
    	MOVD	p_len+16(FP), R5
    
    	// We assume p_len >= 64
    	SRD 	$6, R5
    	MOVD	R5, CTR
    
    	MOVWZ	0(R10), R22
    	MOVWZ	4(R10), R3
    	MOVWZ	8(R10), R4
    	MOVWZ	12(R10), R5
    
    loop:
    	MOVD	R22, R14
    	MOVD	R3, R15
    	MOVD	R4, R16
    	MOVD	R5, R17
    
    	ENDIAN_MOVE( 0,R6,M00,M15)
    	ENDIAN_MOVE( 4,R6,M01,M15)
    	ENDIAN_MOVE( 8,R6,M02,M15)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 20 18:05:32 UTC 2024
    - 5.3K bytes
    - Viewed (0)
  4. src/internal/runtime/atomic/atomic_ppc64x.s

    // bool cas(uint32 *ptr, uint32 old, uint32 new)
    // Atomically:
    //	if(*val == old){
    //		*val = new;
    //		return 1;
    //	} else
    //		return 0;
    TEXT ·Cas(SB), NOSPLIT, $0-17
    	MOVD	ptr+0(FP), R3
    	MOVWZ	old+8(FP), R4
    	MOVWZ	new+12(FP), R5
    	LWSYNC
    cas_again:
    	LWAR	(R3), R6
    	CMPW	R6, R4
    	BNE	cas_fail
    	STWCCC	R5, (R3)
    	BNE	cas_again
    	MOVD	$1, R3
    	LWSYNC
    	MOVB	R3, ret+16(FP)
    	RET
    cas_fail:
    	LWSYNC
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 7.5K bytes
    - Viewed (0)
  5. test/codegen/noextend.go

    	// ppc64x:-"MOVW\tR\\d+,\\sR\\d+"
    	sval64[2] = int64(*x32)
    
    	// ppc64x:-"MOVBZ\tR\\d+,\\sR\\d+"
    	val64[0] = uint64(*u8)
    
    	// ppc64x:-"MOVHZ\tR\\d+,\\sR\\d+"
    	val64[1] = uint64(*u16)
    
    	// ppc64x:-"MOVWZ\tR\\d+,\\sR\\d+"
    	val64[2] = uint64(*u32)
    }
    
    func cmp16(u8 *uint8, x32 *int32, u32 *uint32, x64 *int64, u64 *uint64) bool {
    
    	// ppc64x:-"MOVBZ\tR\\d+,\\sR\\d+"
    	if uint16(*u8) == val16[0] {
    		return true
    	}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Dec 14 17:22:18 UTC 2023
    - 5.4K bytes
    - Viewed (0)
  6. src/crypto/subtle/xor_ppc64x.s

    	XOR	R14, R15, R16   // R16 = a[] ^ b[]
    	SUB	$8, R6          // n = n - 8
    	MOVD	R16, (R3)(R8)   // Store to dst
    	ADD	$8, R8
    xor4:
    	CMP	R6, $4
    	BLT	xor2
    	MOVWZ	(R4)(R8), R14
    	MOVWZ	(R5)(R8), R15
    	XOR	R14, R15, R16
    	MOVW	R16, (R3)(R8)
    	ADD	$4,R8
    	ADD	$-4,R6
    xor2:
    	CMP	R6, $2
    	BLT	xor1
    	MOVHZ	(R4)(R8), R14
    	MOVHZ	(R5)(R8), R15
    	XOR	R14, R15, R16
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 2.9K bytes
    - Viewed (0)
  7. src/crypto/sha512/sha512block_ppc64x.s

    	MOVD	p_len+16(FP), LEN
    
    	SRD	$6, LEN
    	SLD	$6, LEN
    
    	ADD	INP, LEN, END
    
    	CMP	INP, END
    	BEQ	end
    
    	MOVD	$·kcon(SB), TBL_STRT
    
    	MOVD	R0, CNT
    	MOVWZ	$0x010, R_x010
    	MOVWZ	$0x020, R_x020
    	MOVWZ	$0x030, R_x030
    	MOVD	$0x040, R_x040
    	MOVD	$0x050, R_x050
    	MOVD	$0x060, R_x060
    	MOVD	$0x070, R_x070
    	MOVD	$0x080, R_x080
    	MOVD	$0x090, R_x090
    	MOVD	$0x0a0, R_x0a0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 15.8K bytes
    - Viewed (0)
  8. src/cmd/vendor/golang.org/x/sys/unix/bpxsvc_zos.s

    	MOVD  bpx_offset+24(FP), R2 // r2 offset to BPX vector table
    	MOVD  R14, R7               // save r14
    	MOVD  R15, R8               // save r15
    	MOVWZ 16(R0), R9
    	MOVWZ 544(R9), R9
    	MOVWZ 24(R9), R9            // call vector in r9
    	ADD   R2, R9                // add offset to vector table
    	MOVWZ (R9), R9              // r9 points to entry point
    	BYTE  $0x0D                 // BL R14,R9 --> basr r14,r9
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 08 16:12:58 UTC 2024
    - 8.1K bytes
    - Viewed (0)
  9. src/internal/runtime/atomic/atomic_s390x.s

    // func Cas(ptr *uint32, old, new uint32) bool
    // Atomically:
    //	if *ptr == old {
    //		*val = new
    //		return 1
    //	} else {
    //		return 0
    //	}
    TEXT ·Cas(SB), NOSPLIT, $0-17
    	MOVD	ptr+0(FP), R3
    	MOVWZ	old+8(FP), R4
    	MOVWZ	new+12(FP), R5
    	CS	R4, R5, 0(R3)    //  if (R4 == 0(R3)) then 0(R3)= R5
    	BNE	cas_fail
    	MOVB	$1, ret+16(FP)
    	RET
    cas_fail:
    	MOVB	$0, ret+16(FP)
    	RET
    
    // func Cas64(ptr *uint64, old, new uint64) bool
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 7.1K bytes
    - Viewed (0)
  10. src/cmd/asm/internal/asm/testdata/s390x.s

    	// RX (12-bit displacement) and RXY (20-bit displacement) instruction encoding (e.g: ST vs STY)
    	MOVW	R1, 4095(R2)(R3)       // 50132fff
    	MOVW	R1, 4096(R2)(R3)       // e31320000150
    	MOVWZ	R1, 4095(R2)(R3)       // 50132fff
    	MOVWZ	R1, 4096(R2)(R3)       // e31320000150
    	MOVH	R1, 4095(R2)(R3)       // 40132fff
    	MOVHZ   R1, 4095(R2)(R3)       // 40132fff
    	MOVH	R1, 4096(R2)(R3)       // e31320000170
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Nov 22 03:55:32 UTC 2023
    - 21.6K bytes
    - Viewed (0)
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