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Results 1 - 10 of 15 for LoweredWB (0.22 sec)
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src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go
{name: "LoweredGetCallerPC", reg: gp01, rematerializeable: true}, // LoweredWB invokes runtime.gcWriteBarrier. arg0=mem, auxint=# of buffer entries needed // It saves all GP registers if necessary, // but clobbers R1 (LR) because it's a call // and R30 (REGTMP). // Returns a pointer to a write barrier buffer in R29.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:04:19 UTC 2023 - 25.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/config.go
c.UseFMA = false // Don't use Duff's device and SSE on Plan 9 AMD64. if arch == "amd64" { c.noDuffDevice = true c.useSSE = false } } if ctxt.Flag_shared { // LoweredWB is secretly a CALL and CALLs on 386 in // shared mode get rewritten by obj6.go to go through // the GOT, which clobbers BX. opcodeTable[Op386LoweredWB].reg.clobbers |= 1 << 3 // BX }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 02 16:11:47 UTC 2024 - 12.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go
{name: "LoweredGetCallerPC", reg: gp01, rematerializeable: true}, // LoweredWB invokes runtime.gcWriteBarrier. arg0=mem, auxint=# of buffer entries needed // It saves all GP registers if necessary, // but clobbers RA (LR) because it's a call // and T6 (REG_TMP). // Returns a pointer to a write barrier buffer in X24.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 30.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
// LoweredWB invokes runtime.gcWriteBarrier. arg0=mem, auxint=# of buffer entries needed // It preserves R0 through R17 (except special registers R1, R2, R11, R12, R13), g, and R20 and R21, // but may clobber anything else, including R31 (REGTMP). // Returns a pointer to a write barrier buffer in R29.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64.rules
(GetCallerSP ...) => (LoweredGetCallerSP ...) (GetCallerPC ...) => (LoweredGetCallerPC ...) (If cond yes no) => (NE (MOVBUreg <typ.UInt64> cond) yes no) // Write barrier. (WB ...) => (LoweredWB ...) (PanicBounds [kind] x y mem) && boundsABI(kind) == 0 => (LoweredPanicBoundsA [kind] x y mem) (PanicBounds [kind] x y mem) && boundsABI(kind) == 1 => (LoweredPanicBoundsB [kind] x y mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:26:25 UTC 2023 - 31.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/RISCV64.rules
(NilCheck ...) => (LoweredNilCheck ...) (GetClosurePtr ...) => (LoweredGetClosurePtr ...) (GetCallerSP ...) => (LoweredGetCallerSP ...) (GetCallerPC ...) => (LoweredGetCallerPC ...) // Write barrier. (WB ...) => (LoweredWB ...) // Publication barrier as intrinsic (PubBarrier ...) => (LoweredPubBarrier ...) (PanicBounds [kind] x y mem) && boundsABI(kind) == 0 => (LoweredPanicBoundsA [kind] x y mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 40.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
// LoweredWB invokes runtime.gcWriteBarrier{auxint}. arg0=mem, auxint=# of buffer entries needed. // It saves all GP registers if necessary, but may clobber others. // Returns a pointer to a write barrier buffer in R11.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1) -
src/cmd/compile/internal/ssa/_gen/MIPS64.rules
(GetClosurePtr ...) => (LoweredGetClosurePtr ...) (GetCallerSP ...) => (LoweredGetCallerSP ...) (GetCallerPC ...) => (LoweredGetCallerPC ...) (If cond yes no) => (NE cond yes no) // Write barrier. (WB ...) => (LoweredWB ...) (PanicBounds [kind] x y mem) && boundsABI(kind) == 0 => (LoweredPanicBoundsA [kind] x y mem) (PanicBounds [kind] x y mem) && boundsABI(kind) == 1 => (LoweredPanicBoundsB [kind] x y mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 03:59:48 UTC 2023 - 41.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64.rules
(IsInBounds idx len) => (LessThan (CMPU idx len)) (IsSliceInBounds idx len) => (LessEqual (CMPU idx len)) (NilCheck ...) => (LoweredNilCheck ...) // Write barrier. (WB ...) => (LoweredWB ...) // Publication barrier as intrinsic (PubBarrier ...) => (LoweredPubBarrier ...) (PanicBounds [kind] x y mem) && boundsABI(kind) == 0 => (LoweredPanicBoundsA [kind] x y mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0)