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Results 1 - 10 of 10 for intconst (0.2 sec)
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src/cmd/compile/internal/ssa/_gen/PPC64.rules
(AND x (MOVDconst [c])) && isU16Bit(c) => (ANDconst [c] x) (XOR x (MOVDconst [c])) && isU32Bit(c) => (XORconst [c] x) (OR x (MOVDconst [c])) && isU32Bit(c) => (ORconst [c] x) // Simplify consts (ANDconst [c] (ANDconst [d] x)) => (ANDconst [c&d] x) (ORconst [c] (ORconst [d] x)) => (ORconst [c|d] x) (XORconst [c] (XORconst [d] x)) => (XORconst [c^d] x) (ANDconst [-1] x) => x (ANDconst [0] _) => (MOVDconst [0]) (XORconst [0] x) => x
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/experimental/tac/execution_metadata_exporter.cc
#include "tensorflow/compiler/mlir/lite/ir/tfl_ops.h" #include "tensorflow/compiler/mlir/lite/quantization/ir/QuantOps.h" #include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h" namespace tflite { namespace { bool IsConst(mlir::Operation* op) { return llvm::isa<mlir::arith::ConstantOp, mlir::TF::ConstOp, mlir::TFL::ConstOp, mlir::TFL::QConstOp>(op); } bool IsOpSupported(mlir::Operation* op, const std::string& hardware) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 06:11:34 UTC 2024 - 7.5K bytes - Viewed (0) -
analysis/analysis-api-fir/src/org/jetbrains/kotlin/analysis/api/fir/symbols/KtFirKotlinPropertySymbol.kt
} override val isOverride: Boolean get() = withValidityAssertion { firSymbol.isOverride } override val isConst: Boolean get() = withValidityAssertion { firSymbol.isConst } override val isStatic: Boolean get() = withValidityAssertion { firSymbol.isStatic } override val isActual: Boolean get() = withValidityAssertion { firSymbol.isActual }
Registered: Wed Jun 12 09:53:16 UTC 2024 - Last Modified: Tue Jun 11 15:45:42 UTC 2024 - 7.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewritePPC64.go
return true } // match: (ANDconst [c] (ANDconst [d] x)) // result: (ANDconst [c&d] x) for { c := auxIntToInt64(v.AuxInt) if v_0.Op != OpPPC64ANDconst { break } d := auxIntToInt64(v_0.AuxInt) x := v_0.Args[0] v.reset(OpPPC64ANDconst) v.AuxInt = int64ToAuxInt(c & d) v.AddArg(x) return true } // match: (ANDconst [-1] x) // result: x for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 360.2K bytes - Viewed (0) -
analysis/analysis-api-fir/src/org/jetbrains/kotlin/analysis/api/fir/evaluate/FirCompileTimeConstantEvaluator.kt
import org.jetbrains.kotlin.fir.FirElement import org.jetbrains.kotlin.fir.declarations.FirCallableDeclaration import org.jetbrains.kotlin.fir.declarations.FirSimpleFunction import org.jetbrains.kotlin.fir.declarations.utils.isConst import org.jetbrains.kotlin.fir.declarations.utils.isFinal import org.jetbrains.kotlin.fir.declarations.utils.isStatic import org.jetbrains.kotlin.fir.expressions.*
Registered: Wed Jun 12 09:53:16 UTC 2024 - Last Modified: Fri Jun 07 11:53:09 UTC 2024 - 16.2K bytes - Viewed (0) -
src/cmd/compile/internal/liveness/plive.go
fninfo := ls.Func() fninfo.GCArgs, fninfo.GCLocals = lv.emit() p := pp.Prog(obj.AFUNCDATA) p.From.SetConst(rtabi.FUNCDATA_ArgsPointerMaps) p.To.Type = obj.TYPE_MEM p.To.Name = obj.NAME_EXTERN p.To.Sym = fninfo.GCArgs p = pp.Prog(obj.AFUNCDATA) p.From.SetConst(rtabi.FUNCDATA_LocalsPointerMaps) p.To.Type = obj.TYPE_MEM p.To.Name = obj.NAME_EXTERN p.To.Sym = fninfo.GCLocals
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 15:22:22 UTC 2024 - 45.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssagen/ssa.go
p := s.pp.Prog(obj.APCALIGNMAX) p.From.SetConst(hotAlign) p.To.SetConst(hotRequire) } s.bstart[b.ID] = s.pp.Next if idx, ok := argLiveBlockMap[b.ID]; ok && idx != argLiveIdx { argLiveIdx = idx p := s.pp.Prog(obj.APCDATA) p.From.SetConst(rtabi.PCDATA_ArgLiveIndex) p.To.SetConst(int64(idx)) } // Emit values in block
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jun 10 19:44:43 UTC 2024 - 284.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite.go
// and return mask & m. func mergePPC64RShiftMask(m, s, nbits int64) int64 { smask := uint64((1<<uint(nbits))-1) >> uint(s) return m & int64(smask) } // Combine (ANDconst [m] (SRWconst [s])) into (RLWINM [y]) or return 0 func mergePPC64AndSrwi(m, s int64) int64 { mask := mergePPC64RShiftMask(m, s, 32) if !isPPC64WordRotateMask(mask) { return 0 }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 64.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/flatbuffer_export.cc
// for now for safety and this could be revisited when required. return Status(absl::StatusCode::kInvalidArgument, "Unsupported type"); } static bool IsConst(Operation* op) { return isa<mlir::func::ConstantOp, mlir::arith::ConstantOp, mlir::TF::ConstOp, tfl::ConstOp, tfl::QConstOp, tfl::SparseConstOp, tfl::SparseQConstOp, mlir::TFL::NoValueOp,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jun 12 21:41:49 UTC 2024 - 164.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf.cc
for (auto i = 0; i < slice_sizes.size(); ++i) { if (slice_sizes[i] == tensorflow::kTFDynamicSize) { Value i_const = rewriter.create<arith::ConstantOp>( op.getLoc(), rewriter.getIndexAttr(i)); Value slice_size_index = rewriter.create<shape::DimOp>(op.getLoc(), op.getValue(), i_const); Value index_to_i64 = rewriter.create<arith::IndexCastOp>(
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 20:00:43 UTC 2024 - 291.8K bytes - Viewed (0)