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Results 1 - 3 of 3 for CTR (0.03 sec)

  1. src/cmd/asm/internal/asm/testdata/ppc64.s

    	BC $20,CR0LT,CTR                // 4e800420
    	BC $20,CR0GT,CTR                // 4e810420
    	BC 20,CR0LT,CTR                 // BC $20,CR0LT,CTR // 4e800420
    	BC 20,undefined_symbol,CTR      // BC $20,CR0LT,CTR // 4e800420
    	BC 20,undefined_symbol+1,CTR    // BC $20,CR0GT,CTR // 4e810420
    	JMP CTR                         // 4e800420
    	BR CTR                          // JMP CTR // 4e800420
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Oct 29 13:14:38 UTC 2024
    - 51K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/asm.go

    		} else {
    			p.branch(targetAddr, targetProg)
    		}
    	case target.Type == obj.TYPE_MEM && target.Name == obj.NAME_NONE:
    		// JMP 4(R0)
    		*targetAddr = *target
    		// On the ppc64, 9a encodes BR (CTR) as BR CTR. We do the same.
    		if p.arch.Family == sys.PPC64 && target.Offset == 0 {
    			targetAddr.Type = obj.TYPE_REG
    		}
    	case target.Type == obj.TYPE_CONST:
    		// JMP $4
    		*targetAddr = a[0]
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Oct 21 14:11:44 UTC 2024
    - 25.5K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/arch/arch.go

    	}
    	for i := ppc64.REG_CR0LT; i <= ppc64.REG_CR7SO; i++ {
    		register[obj.Rconv(i)] = int16(i)
    	}
    	register["CR"] = ppc64.REG_CR
    	register["XER"] = ppc64.REG_XER
    	register["LR"] = ppc64.REG_LR
    	register["CTR"] = ppc64.REG_CTR
    	register["FPSCR"] = ppc64.REG_FPSCR
    	register["MSR"] = ppc64.REG_MSR
    	// Pseudo-registers.
    	register["SB"] = RSB
    	register["FP"] = RFP
    	register["PC"] = RPC
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Thu Oct 24 12:32:56 UTC 2024
    - 21.5K bytes
    - Viewed (0)
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