(MOVWreg y:(AND (MOVDconst [c]) _)) && uint64(c) <= 0x7FFFFFFF => y

// small and of zero-extend => either zero-extend or small and
(ANDconst [c] y:(MOVBZreg _)) && c&0xFF == 0xFF => y
(ANDconst [0xFF] (MOVBreg x)) => (MOVBZreg x)
(ANDconst [c] y:(MOVHZreg _))  && c&0xFFFF == 0xFFFF => y
(ANDconst [0xFFFF] (MOVHreg x)) => (MOVHZreg x)

(AND (MOVDconst [c]) y:(MOVWZreg _))  && c&0xFFFFFFFF == 0xFFFFFFFF => y

	=> (REV16 x)

// ((x & 0xff00ff00)>>8) | ((x & 0x00ff00ff)<<8), "|" can also be "^" or "+".
((ADDshiftLL|ORshiftLL|XORshiftLL) [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
	&& (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
	=> (REV16 (ANDconst <x.Type> [0xffffffff] x))

// Extract from reg pair
(ADDshiftLL [c] (SRLconst x [64-c]) x2) => (EXTRconst [64-c] x2 x)

(AND(Q|L)const [  0xFF] x) => (MOVBQZX x)
(AND(Q|L)const [0xFFFF] x) => (MOVWQZX x)
// This rule is currently invalid because 0xFFFFFFFF is not representable by a signed int32.
// Commenting out for now, because it also can't trigger because of the is32bit guard on the
// ANDQconst lowering-rule, above, prevents 0xFFFFFFFF from matching (for the same reason)
// Using an alternate form of this rule segfaults some binaries because of

(Trunc64to8  (And64 (Const64 [y]) x)) && y&0xFF == 0xFF => (Trunc64to8 x)
(Trunc64to16 (And64 (Const64 [y]) x)) && y&0xFFFF == 0xFFFF => (Trunc64to16 x)
(Trunc64to32 (And64 (Const64 [y]) x)) && y&0xFFFFFFFF == 0xFFFFFFFF => (Trunc64to32 x)
(Trunc32to8  (And32 (Const32 [y]) x)) && y&0xFF == 0xFF => (Trunc32to8 x)
(Trunc32to16 (And32 (Const32 [y]) x)) && y&0xFFFF == 0xFFFF => (Trunc32to16 x)