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  2. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/arm64.s 

    	VREV32	V5.B16, V5.B16                  // a508206e
	VREV64	V2.S2, V3.S2                    // 4308a00e
	VREV64	V2.S4, V3.S4                    // 4308a04e

// logical ops
//
// make sure constants get encoded into an instruction when it could
	AND	R1@>33, R2
	AND	$(1<<63), R1                        // AND	$-9223372036854775808, R1       // 21004192
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
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  3. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/arm.s 

    	SLL.S	$31, R5              // 855fb0e1
	SLL	R5, R6, R7           // 1675a0e1
	SLL.S	R5, R6, R7           // 1675b0e1
	SLL	R5, R7               // 1775a0e1
	SLL.S	R5, R7               // 1775b0e1

// Ops with zero shifts should encode as left shifts
	ADD	R0<<0, R1, R2	     // 002081e0
	ADD	R0>>0, R1, R2	     // 002081e0
	ADD	R0->0, R1, R2	     // 002081e0
	ADD	R0@>0, R1, R2	     // 002081e0
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 15 20:51:01 GMT 2023
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    - Viewed (0)
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