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Results 1 - 5 of 5 for condition (0.2 sec)

  2. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/arm64error.s 

    	CINC	NV, R2, R3                                       // ERROR "invalid condition"
	CINVW	AL, R2, R3                                       // ERROR "invalid condition"
	CINV	NV, R2, R3                                       // ERROR "invalid condition"
	CNEG	AL, R2, R3                                       // ERROR "invalid condition"
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    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
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  3. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/mips64.s 

    	BEQ	R1, R2, label2	// BEQ R1, R2, 20	// 1022fffd

//
// other integer conditional branch
//
//	LBRA rreg ',' rel
//	{
//		outcode(int($1), &$2, 0, &$4);
//	}
label3:
	BLTZ	R1, 1(PC)	// BLTZ R1, 1(PC)	// 04200001
	BLTZ	R1, label3	// BLTZ R1, 22		// 0420fffd

//
// floating point conditional branch
//
//	LBRA rel
label4:
	BFPT	1(PC)	// BFPT 1(PC)			// 4501000100000000
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    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Aug 08 12:17:12 GMT 2023
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  4. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/arm64.s 

    	VMOV	V9.H[0], V12.H[1]     // 2c05066e
	VMOV	V8.B[0], V12.B[1]     // 0c05036e
	VMOV	V8.B[7], V4.B[8]      // 043d116e

// CBZ
again:
	CBZ	R1, again // CBZ R1

// conditional operations
	CSET	GT, R1	        // e1d79f9a
	CSETW	HI, R2	        // e2979f1a
	CSEL	LT, R1, R2, ZR	// 3fb0829a
	CSELW	LT, R2, R3, R4	// 44b0831a
	CSINC	GT, R1, ZR, R3	// 23c49f9a
	CSNEG	MI, R1, R2, R3	// 234482da
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    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
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  5. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/mips.s 

    	//	}
	NOP	$4

	//
	// special
	//
	SYSCALL
	BREAK
	SYNC

	//
	// conditional move on zero/nonzero gp value
	//
	CMOVN	R1, R2, R3
	CMOVZ	R1, R2, R3

	//
	// conditional move on fp false/true
	//
	CMOVF	R1, R2
	CMOVT	R1, R2

	//
	// conditional traps
	//
	TEQ	$1, R1, R2
	TEQ	$1, R1


	//
	// other
	//
	CLO	R1, R2
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    - Last Modified: Tue Aug 08 12:17:12 GMT 2023
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  6. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/riscv64.s 

    	REMU	X5, X6, X7				// b3735302
	DIVW	X5, X6, X7				// bb435302
	DIVUW	X5, X6, X7				// bb535302
	REMW	X5, X6, X7				// bb635302
	REMUW	X5, X6, X7				// bb735302

	// 8.2: Load-Reserved/Store-Conditional
	LRW	(X5), X6				// 2fa30214
	LRD	(X5), X6				// 2fb30214
	SCW	X5, (X6), X7				// af23531a
	SCD	X5, (X6), X7				// af33531a

	// 8.3: Atomic Memory Operations
	AMOSWAPW	X5, (X6), X7			// af23530e
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    - Last Modified: Fri Mar 22 04:42:21 GMT 2024
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