*   Enable JIT-compiled i64-indexed kernels on GPU for large tensors with more than 2**32 elements.
    *   Unary GPU kernels: Abs, Atanh, Acos, Acosh, Asin, Asinh, Atan, Cos, Cosh, Sin, Sinh, Tan, Tanh.
    *   Binary GPU kernels: AddV2, Sub, Div, DivNoNan, Mul, MulNoNan, FloorDiv, Equal, NotEqual, Greater, GreaterEqual, LessEqual, Less.

* `tf.lite`

* 📝 Add External Link: ML serving and monitoring with FastAPI and Evidently. PR [#9701](https://github.com/tiangolo/fastapi/pull/9701) by [@mnrozhkov](https://github.com/mnrozhkov).
* 📝 Reword in docs, from "have in mind" to "keep in mind". PR [#10376](https://github.com/tiangolo/fastapi/pull/10376) by [@malicious](https://github.com/malicious).

pkg syscall (freebsd-arm64), func Access(string, uint32) error
pkg syscall (freebsd-arm64), func Adjtime(*Timeval, *Timeval) error
pkg syscall (freebsd-arm64), func Bind(int, Sockaddr) error
pkg syscall (freebsd-arm64), func BpfBuflen //deprecated
pkg syscall (freebsd-arm64), func BpfBuflen(int) (int, error)
pkg syscall (freebsd-arm64), func BpfDatalink //deprecated

pkg syscall (freebsd-riscv64), func Access(string, uint32) error #53466
pkg syscall (freebsd-riscv64), func Adjtime(*Timeval, *Timeval) error #53466
pkg syscall (freebsd-riscv64), func Bind(int, Sockaddr) error #53466
pkg syscall (freebsd-riscv64), func BpfBuflen //deprecated #53466
pkg syscall (freebsd-riscv64), func BpfBuflen(int) (int, error) #53466

ivhi+40(FP), IV_HIGH_LE {{/* Prepare plain from IV and blockIndex. */}} {{/* Copy to plaintext registers. */}} {{ range $i := xrange $N }} REV IV_LOW_LE, IV_LOW_BE REV IV_HIGH_LE, IV_HIGH_BE {{- /* https://developer.arm.com/documentation/dui0801/g/A64-SIMD-Vector-Instructions/MOV--vector--from-general- */}} VMOV IV_LOW_BE, V{{ block_reg $i }}.D[1] VMOV IV_HIGH_BE, V{{ block_reg $i }}.D[0] {{- if ne (add $i 1) $N }} ADDS $1, IV_LOW_LE ADC $0, IV_HIGH_LE {{ end }} {{ end }} {{/* Num rounds branching. */}}...

ivhi+40(FP), IV_HIGH_LE {{/* Prepare plain from IV and blockIndex. */}} {{/* Copy to plaintext registers. */}} {{ range $i := xrange $N }} REV IV_LOW_LE, IV_LOW_BE REV IV_HIGH_LE, IV_HIGH_BE {{- /* https://developer.arm.com/documentation/dui0801/g/A64-SIMD-Vector-Instructions/MOV--vector--from-general- */}} VMOV IV_LOW_BE, V{{ block_reg $i }}.D[1] VMOV IV_HIGH_BE, V{{ block_reg $i }}.D[0] {{- if ne (add $i 1) $N }} ADDS $1, IV_LOW_LE ADC $0, IV_HIGH_LE {{ end }} {{ end }} {{/* Num rounds branching. */}}...