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  1. RELEASE.md

            is set in compile. The single path execution code does not yet support
            all use cases. We fallback to the existing v1 execution paths if your
            model contains the following:
            1.  `sample_weight_mode` in compile
            2.  `weighted_metrics` in compile
            3.  v1 optimizer
            4.  target tensors in compile If you are experiencing any issues because
    Registered: Tue Dec 30 12:39:10 UTC 2025
    - Last Modified: Tue Oct 28 22:27:41 UTC 2025
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  2. lib/fips140/v1.0.0-c2097c7c.zip

    operation, and aggressively // unrolls loops. arm64 processes four words at a time. // // It's unclear why the assembly for all other architectures, as well as for // amd64 without ADX, perform better than the compiler output. // TODO(filippo): file cmd/compile performance issue. var supportADX = cpu.X86HasADX && cpu.X86HasBMI2 func init() { if cpu.AMD64 { impl.Register("aes", "ADX", &supportADX) } } //go:noescape func addMulVVW1024(z, x *uint, y uint) (c uint) //go:noescape func addMulVVW1536(z, x *uint,...
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Sep 25 19:53:19 UTC 2025
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  3. lib/fips140/v1.1.0-rc1.zip

    operation, and aggressively // unrolls loops. arm64 processes four words at a time. // // It's unclear why the assembly for all other architectures, as well as for // amd64 without ADX, perform better than the compiler output. // TODO(filippo): file cmd/compile performance issue. var supportADX = cpu.X86HasADX && cpu.X86HasBMI2 func init() { if cpu.AMD64 { impl.Register("aes", "ADX", &supportADX) } } //go:noescape func addMulVVW1024(z, x *uint, y uint) (c uint) //go:noescape func addMulVVW1536(z, x *uint,...
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Dec 11 16:27:41 UTC 2025
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