- Sort Score
- Result 10 results
- Languages All
Results 1 - 3 of 3 for israel (0.06 sec)
-
src/cmd/asm/internal/asm/testdata/amd64enc.s
PSRAL $7, M2 // 0f72e207 PSRAL $7, M3 // 0f72e307 PSRAL (BX), X2 // 660fe213 PSRAL (R11), X2 // 66410fe213 PSRAL X2, X2 // 660fe2d2 PSRAL X11, X2 // 66410fe2d3 PSRAL (BX), X11 // 66440fe21b
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Fri Oct 08 21:38:44 UTC 2021 - 581.9K bytes - Viewed (1) -
RELEASE.md
Darren Garvey, Dmitri Lapin, Eron Wright, Evan Cofer, Fabrizio Milo, Finbarr Timbers, Franck Dernoncourt, Garrett Smith, @guschmue, Hao Wei, Henrik Holst, Huazuo Gao, @Ian, @Issac, Jacob Israel, Jangsoo Park, Jin Kim, Jingtian Peng, John Pope, Kye Bostelmann, Liangliang He, Ling Zhang, Luheng He, Luke Iwanski, @lvli, Michael Basilyan, Mihir Patel, Mikalai Drabovich, Morten Just, @newge,
Registered: Tue Sep 09 12:39:10 UTC 2025 - Last Modified: Mon Aug 18 20:54:38 UTC 2025 - 740K bytes - Viewed (2) -
lib/fips140/v1.0.0.zip
0,S1H,S1L) STXVD2X RH, (R1)(R17) // Save RH // if R == 0 or R^P == 0 then ret=ret else ret=0 // clobbers T1H and T1L // Redo this using ISEL?? MOVD $1, TRUE VSPLTISB $0, ZER VOR RL, RH, T1H VCMPEQUDCC ZER, T1H, T1H // 24 = CR6 NE ISEL $26, R0, TRUE, RES1 VXOR RL, PL, T1L VXOR RH, PH, T1H // SAVE: T1L VOR T1L, T1H, T1H VCMPEQUDCC ZER, T1H, T1H // 26 = CR6 NE ISEL $26, R0, TRUE, RES2 OR RES2, RES1, RES1 MOVD ret+24(FP), RES2 AND RES2, RES1, RES1 MOVD RES1, ret+24(FP) // X=H ; Y=H ; MUL; T- // T1 =...
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jan 29 15:10:35 UTC 2025 - 635K bytes - Viewed (0)