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  1. RELEASE.md

                AVX512_BF16, AMX, etc.
                ([Intel Cascade Lake](https://www.intel.com/content/www/us/en/products/platforms/details/cascade-lake.html)
                and newer CPUs.)
                *   [Example performance speedups.](https://medium.com/intel-analytics-software/leverage-intel-deep-learning-optimizations-in-tensorflow-129faa80ee07)
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 23:24:08 UTC 2024
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  2. tensorflow/compiler/mlir/tensorflow/ir/tf_generated_ops.td

    .
      }];
    
      let arguments = (ins
        Arg<TF_NumberTensor, [{the input tensor}]>:$lhs,
        Arg<TF_NumberTensor, [{the kernel tensor}]>:$rhs,
        Arg<TF_I32OrI64Tensor, [{the inter-window strides}]>:$window_strides,
        Arg<TF_I32OrI64Tensor, [{the padding to apply at the start and end of each input dimensions}]>:$padding,
        Arg<TF_I32OrI64Tensor, [{dilation to apply between input elements}]>:$lhs_dilation,
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 23:24:08 UTC 2024
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  3. api/openapi-spec/v3/apis__apps__v1_openapi.json

            },
            "required": [
              "pdID"
            ],
            "type": "object"
          },
          "io.k8s.api.core.v1.PodAffinity": {
            "description": "Pod affinity is a group of inter pod affinity scheduling rules.",
            "properties": {
              "preferredDuringSchedulingIgnoredDuringExecution": {
    Registered: Sat Jun 15 01:39:40 UTC 2024
    - Last Modified: Wed May 29 22:40:29 UTC 2024
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