v.reset(OpAMD64BTRQconst)
		v.AuxInt = int8ToAuxInt(c)
		v.AddArg(x)
		return true
	}
	// match: (BTRQconst [c] (BTCQconst [c] x))
	// result: (BTRQconst [c] x)
	for {
		c := auxIntToInt8(v.AuxInt)
		if v_0.Op != OpAMD64BTCQconst || auxIntToInt8(v_0.AuxInt) != c {
			break
		}
		x := v_0.Args[0]
		v.reset(OpAMD64BTRQconst)
		v.AuxInt = int8ToAuxInt(c)
		v.AddArg(x)
		return true
	}

					v2 := b.NewValue0(v.Pos, OpConst8, typ.UInt8)
					v2.AuxInt = int8ToAuxInt(int8(udivisible8(c).m))
					v1.AddArg2(v2, x)
					v3 := b.NewValue0(v.Pos, OpConst8, typ.UInt8)
					v3.AuxInt = int8ToAuxInt(int8(8 - udivisible8(c).k))
					v0.AddArg2(v1, v3)
					v4 := b.NewValue0(v.Pos, OpConst8, typ.UInt8)
					v4.AuxInt = int8ToAuxInt(int8(udivisible8(c).max))
					v.AddArg2(v0, v4)
					return true
				}