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  1. lib/fips140/v1.0.0.zip

    blockloop: VLD1.P 16(R1), [V4.B16] // load 16bytes message VLD1.P 16(R1), [V5.B16] // load 16bytes message VLD1.P 16(R1), [V6.B16] // load 16bytes message VLD1.P 16(R1), [V7.B16] // load 16bytes message VMOV V0.B16, V2.B16 // backup: VO h(dcba) VMOV V1.B16, V3.B16 // backup: V1 h(hgfe) VMOV V2.B16, V8.B16 VREV32 V4.B16, V4.B16 // prepare for using message in Byte format VREV32 V5.B16, V5.B16 VREV32 V6.B16, V6.B16 VREV32 V7.B16, V7.B16 VADD V16.S4, V4.S4, V9.S4 // V18(W0+K0...W3+K3) SHA256SU0 V5.S4,...
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Jan 29 15:10:35 UTC 2025
    - 635K bytes
    - Viewed (0)
  2. RELEASE.md

        *   XLA reduction emitter is deterministic when the environment variable
            `TF_DETERMINISTIC_OPS` is set to "true" or "1". This extends
            deterministic `tf.nn.bias_add` back-prop functionality (and therefore
            also deterministic back-prop of bias-addition in Keras layers) to
            include when XLA JIT compilation is enabled.
        *   Fix problem, when running on a CUDA GPU and when either environment
    Registered: Tue Sep 09 12:39:10 UTC 2025
    - Last Modified: Mon Aug 18 20:54:38 UTC 2025
    - 740K bytes
    - Viewed (3)
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