continue
				}
				v.reset(OpAdd32)
				v.AddArg2(y, z)
				return true
			}
		}
		break
	}
	// match: (Add32 (Add32 i:(Const32 <t>) z) x)
	// cond: (z.Op != OpConst32 && x.Op != OpConst32)
	// result: (Add32 i (Add32 <t> z x))
	for {
		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
			if v_0.Op != OpAdd32 {
				continue
			}
			_ = v_0.Args[1]

		{"ToNearestEven", Const, 5},
		{"ToNegativeInf", Const, 5},
		{"ToPositiveInf", Const, 5},
		{"ToZero", Const, 5},
		{"Word", Type, 0},
	},
	"math/bits": {
		{"Add", Func, 12},
		{"Add32", Func, 12},
		{"Add64", Func, 12},
		{"Div", Func, 12},
		{"Div32", Func, 12},
		{"Div64", Func, 12},
		{"LeadingZeros", Func, 9},
		{"LeadingZeros16", Func, 9},
		{"LeadingZeros32", Func, 9},

  );

  TF_DerivedOperandSizeAttr N = TF_DerivedOperandSizeAttr<0>;
  TF_DerivedOperandTypeAttr T = TF_DerivedOperandTypeAttr<0>;

  let hasFolder = 1;
}

def TF_AddV2Op : TF_Op<"AddV2", [Commutative, Pure, ResultsBroadcastableShape, TF_CwiseBinary, TF_LayoutAgnostic, TF_SameOperandsAndResultElementTypeResolveRef]>,
                 WithBroadcastableBinOpBuilder {
  let summary = "Returns x + y element-wise.";

*   Enable JIT-compiled i64-indexed kernels on GPU for large tensors with more than 2**32 elements.
    *   Unary GPU kernels: Abs, Atanh, Acos, Acosh, Asin, Asinh, Atan, Cos, Cosh, Sin, Sinh, Tan, Tanh.
    *   Binary GPU kernels: AddV2, Sub, Div, DivNoNan, Mul, MulNoNan, FloorDiv, Equal, NotEqual, Greater, GreaterEqual, LessEqual, Less.

* `tf.lite`
    * Add experimental supports conversion of models that may be larger than 2GB before buffer deduplication