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Results 1 - 5 of 5 for ARM (0.04 sec)

  2. github.com/kubernetes/kubernetes

    CHANGELOG/CHANGELOG-1.19.md 

    [kubernetes-client-linux-arm.tar.gz](https://dl.k8s.io/v1.19.16/kubernetes-client-linux-arm.tar.gz) | 5853f42c40ebbe620435bea036ac098a9ea206fd63dc13845e97a43c422fd3b47977b90fdbf76b6d13ea908210a77b5410066dc388dacccd88b47c1cb5ccef75
    Registered: Fri Dec 26 09:05:12 UTC 2025
    - Last Modified: Wed Jan 05 05:42:32 UTC 2022
    - 489.7K bytes
    - Viewed (0)
  3. github.com/golang/go

    api/go1.20.txt 

    pkg syscall (freebsd-arm), const SYS_FSTAT = 551 #53280
pkg syscall (freebsd-arm), const SYS_FSTATAT = 552 #53280
pkg syscall (freebsd-arm), const SYS_FSTATFS = 556 #53280
pkg syscall (freebsd-arm), const SYS_GETDIRENTRIES = 554 #53280
pkg syscall (freebsd-arm), const SYS_GETFSSTAT = 557 #53280
pkg syscall (freebsd-arm), const SYS_MKNODAT = 559 #53280
pkg syscall (freebsd-arm), const SYS_STATFS = 555 #53280
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Fri Feb 17 21:23:32 UTC 2023
    - 602.6K bytes
    - Viewed (0)
  4. github.com/tensorflow/tensorflow

    RELEASE.md 

            back to a while loop.

*   XLA:

    *   `tf.distribute.MultiWorkerMirroredStrategy` is now compilable with XLA.
    *   [Compute Library for the Arm® Architecture (ACL)](https://github.com/ARM-software/ComputeLibrary)
        is supported for aarch64 CPU XLA runtime

*   CPU performance optimizations:

    *   **x86 CPUs**:
    Registered: Tue Dec 30 12:39:10 UTC 2025
    - Last Modified: Tue Oct 28 22:27:41 UTC 2025
    - 740.4K bytes
    - Viewed (3)
  5. github.com/golang/go

    lib/fips140/v1.0.0-c2097c7c.zip 

    MOVD ivlo+32(FP), IV_LOW_LE MOVD ivhi+40(FP), IV_HIGH_LE {{/* Prepare plain from IV and blockIndex. */}} {{/* Copy to plaintext registers. */}} {{ range $i := xrange $N }} REV IV_LOW_LE, IV_LOW_BE REV IV_HIGH_LE, IV_HIGH_BE {{- /* https://developer.arm.com/documentation/dui0801/g/A64-SIMD-Vector-Instructions/MOV--vector--from-general- */}} VMOV IV_LOW_BE, V{{ block_reg $i }}.D[1] VMOV IV_HIGH_BE, V{{ block_reg $i }}.D[0] {{- if ne (add $i 1) $N }} ADDS $1, IV_LOW_LE ADC $0, IV_HIGH_LE {{ end }} {{...
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Sep 25 19:53:19 UTC 2025
    - 642.7K bytes
    - Viewed (0)
  6. github.com/golang/go

    lib/fips140/v1.1.0-rc1.zip 

    MOVD ivlo+32(FP), IV_LOW_LE MOVD ivhi+40(FP), IV_HIGH_LE {{/* Prepare plain from IV and blockIndex. */}} {{/* Copy to plaintext registers. */}} {{ range $i := xrange $N }} REV IV_LOW_LE, IV_LOW_BE REV IV_HIGH_LE, IV_HIGH_BE {{- /* https://developer.arm.com/documentation/dui0801/g/A64-SIMD-Vector-Instructions/MOV--vector--from-general- */}} VMOV IV_LOW_BE, V{{ block_reg $i }}.D[1] VMOV IV_HIGH_BE, V{{ block_reg $i }}.D[0] {{- if ne (add $i 1) $N }} ADDS $1, IV_LOW_LE ADC $0, IV_HIGH_LE {{ end }} {{...
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Dec 11 16:27:41 UTC 2025
    - 663K bytes
    - Viewed (0)
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