pkg syscall (freebsd-arm64), const AF_INET6 = 28
pkg syscall (freebsd-arm64), const AF_INET6_SDP = 42
pkg syscall (freebsd-arm64), const AF_INET6_SDP ideal-int
pkg syscall (freebsd-arm64), const AF_IPX = 23
pkg syscall (freebsd-arm64), const AF_IPX ideal-int
pkg syscall (freebsd-arm64), const AF_ISDN = 26
pkg syscall (freebsd-arm64), const AF_ISDN ideal-int
pkg syscall (freebsd-arm64), const AF_ISO = 7

a[19] = bc4 ^ (bc1 &^ bc0) t = a[5] ^ d0 bc1 = bits.RotateLeft64(t, 36) t = a[11] ^ d1 bc2 = bits.RotateLeft64(t, 10) t = a[17] ^ d2 bc3 = bits.RotateLeft64(t, 15) t = a[23] ^ d3 bc4 = bits.RotateLeft64(t, 56) t = a[4] ^ d4 bc0 = bits.RotateLeft64(t, 27) a[5] = bc0 ^ (bc2 &^ bc1) a[11] = bc1 ^ (bc3 &^ bc2) a[17] = bc2 ^ (bc4 &^ bc3) a[23] = bc3 ^ (bc0 &^ bc4) a[4] = bc4 ^ (bc1 &^ bc0) t = a[15] ^ d0 bc3 = bits.RotateLeft64(t, 41) t = a[21] ^ d1 bc4 = bits.RotateLeft64(t, 2) t = a[2] ^ d2 bc0 = bits.RotateLeft64(t,...

power2Round implements Power2Round from FIPS 204. // // It separates the bottom d = 13 bits of each 23-bit coefficient, rounding the // high part based on the low part, and correcting the low part accordingly. func power2Round(r fieldElement) (hi uint16, lo fieldElement) { rr := fieldFromMontgomery(r) // Add 2¹² - 1 to round up r1 by one if r0 > 2¹². // r is at most 2²³ - 2¹³ + 1, so rr + (2¹² - 1) won't overflow 23 bits. r1 := rr + 1<<12 - 1 r1 >>= 13 // r1 <= 2¹⁰ - 1 // r1 * 2¹³ <= (2¹⁰ - 1) * 2¹³ = 2²³...

        including matmuls and convolutions, due to the use of
        [TensorFloat-32](https://blogs.nvidia.com/blog/2020/05/14/tensorfloat-32-precision-format/).
        Specifically, inputs to such ops are rounded from 23 bits of precision
        to 10 bits of precision. This is unlikely to cause issues in practice
        for deep learning models. In some cases, TensorFloat-32 is also used for