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Results 1 - 5 of 5 for Restore (0.82 sec)
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RELEASE.md
* Provided a new `experimental_skip_saver` argument which, if specified, will suppress the addition of `SavedModel`-native save and restore ops to the `SavedModel`, for cases where users already build custom save/restore ops and checkpoint formats for the model being saved, and the creation of the SavedModel-native save/restore ops simply cause longer model serialization times. * Add ops to `tensorflow.raw_ops` that were missing. * `tf.CheckpointOptions`
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 23:24:08 UTC 2024 - 730.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_generated_ops.td
Arg<TF_StrTensor, [{shape {N}. The names of the tensors to be restored.}]>:$tensor_names, Arg<TF_StrTensor, [{shape {N}. The slice specs of the tensors to be restored. Empty strings indicate that they are non-partitioned tensors.}]>:$shape_and_slices ); let results = (outs Res<Variadic<TF_Tensor>, [{shape {N}. The restored tensors, whose shapes are read from the checkpoint directly.}]>:$tensors
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 23:24:08 UTC 2024 - 793K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewritegeneric.go
} // match: (Move {t1} [n] dst1 src1 store:(Store {t2} op:(OffPtr [o2] dst2) _ mem)) // cond: isSamePtr(dst1, dst2) && store.Uses == 1 && n >= o2 + t2.Size() && disjoint(src1, n, op, t2.Size()) && clobber(store) // result: (Move {t1} [n] dst1 src1 mem) for { n := auxIntToInt64(v.AuxInt) t1 := auxToType(v.Aux) dst1 := v_0 src1 := v_1 store := v_2 if store.Op != OpStore { break }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 22 18:24:47 UTC 2024 - 812.2K bytes - Viewed (0) -
okhttp-idna-mapping-table/src/main/resources/okhttp3/internal/idna/IdnaMappingTable.txt
1F643..1F644 ; valid ; ; NV8 # 8.0 UPSIDE-DOWN FACE..FACE WITH ROLLING EYES 1F645..1F64F ; valid ; ; NV8 # 6.0 FACE WITH NO GOOD GESTURE..PERSON WITH FOLDED HANDS 1F650..1F67F ; valid ; ; NV8 # 7.0 NORTH WEST POINTING LEAF..REVERSE CHECKER BOARD 1F680..1F6C5 ; valid ; ; NV8 # 6.0 ROCKET..LEFT LUGGAGE
Registered: Sun Jun 16 04:42:17 UTC 2024 - Last Modified: Sat Feb 10 11:25:47 UTC 2024 - 854.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteAMD64.go
} // match: (Store {t} ptr val mem) // cond: t.Size() == 8 && !t.IsFloat() // result: (MOVQstore ptr val mem) for { t := auxToType(v.Aux) ptr := v_0 val := v_1 mem := v_2 if !(t.Size() == 8 && !t.IsFloat()) { break } v.reset(OpAMD64MOVQstore) v.AddArg3(ptr, val, mem) return true } // match: (Store {t} ptr val mem)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 712.7K bytes - Viewed (0)