return true
		}
		break
	}
	// match: (Sub32 (Sub32 x y) x)
	// result: (Neg32 y)
	for {
		if v_0.Op != OpSub32 {
			break
		}
		y := v_0.Args[1]
		x := v_0.Args[0]
		if x != v_1 {
			break
		}
		v.reset(OpNeg32)
		v.AddArg(y)
		return true
	}
	// match: (Sub32 x (Add32 x y))
	// result: (Neg32 y)
	for {
		x := v_0