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Results 1 - 2 of 2 for add32a (0.12 sec)

  1. tensorflow/compiler/mlir/tensorflow/ir/tf_generated_ops.td

      );
    
      TF_DerivedOperandSizeAttr N = TF_DerivedOperandSizeAttr<0>;
      TF_DerivedOperandTypeAttr T = TF_DerivedOperandTypeAttr<0>;
    
      let hasFolder = 1;
    }
    
    def TF_AddV2Op : TF_Op<"AddV2", [Commutative, Pure, ResultsBroadcastableShape, TF_CwiseBinary, TF_LayoutAgnostic, TF_SameOperandsAndResultElementTypeResolveRef]>,
                     WithBroadcastableBinOpBuilder {
      let summary = "Returns x + y element-wise.";
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 23:24:08 UTC 2024
    - 793K bytes
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  2. RELEASE.md

    *   Enable JIT-compiled i64-indexed kernels on GPU for large tensors with more than 2**32 elements.
        *   Unary GPU kernels: Abs, Atanh, Acos, Acosh, Asin, Asinh, Atan, Cos, Cosh, Sin, Sinh, Tan, Tanh.
        *   Binary GPU kernels: AddV2, Sub, Div, DivNoNan, Mul, MulNoNan, FloorDiv, Equal, NotEqual, Greater, GreaterEqual, LessEqual, Less.
    
    * `tf.lite`
        * Add experimental supports conversion of models that may be larger than 2GB before buffer deduplication
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 23:24:08 UTC 2024
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