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src/cmd/asm/internal/asm/testdata/arm.s
// MULL r1,r2,(hi,lo) // // LTYPEM cond reg ',' reg ',' regreg // { // outcode($1, $2, &$3, int32($5.Reg), &$7); // } MULL R1, R2, (R3,R4) // // MULA r1,r2,r3,r4: (r1*r2+r3) & 0xffffffff . r4 // MULAW{T,B} r1,r2,r3,r4 // // LTYPEN cond reg ',' reg ',' reg ',' spreg // { // $7.Type = obj.TYPE_REGREG2; // $7.Offset = int64($9); // outcode($1, $2, &$3, int32($5.Reg), &$7); // } MULAWT R1, R2, R3, R4
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Fri Dec 15 20:51:01 UTC 2023 - 69K bytes - Viewed (0)