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Results 1 - 10 of 61 for power9 (0.31 sec)
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src/cmd/compile/internal/ssa/_gen/PPC64.rules
// Non-indexed ops generate DS-form loads and stores when the offset fits in 16 bits, // and on power8 and power9, a multiple of 4 is required for MOVW and MOVD ops. // On power10, prefixed loads and stores can be used for offsets > 16 bits and <= 32 bits. // and support for PC relative addressing must be available if relocation is needed. // On power10, the assembler will determine when to use DS-form or prefixed
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0) -
src/cmd/compile/internal/ppc64/ssa.go
bytesPerLoop := int64(64) // This is used when moving more // than 8 bytes on power9. Moves start with // as many 8 byte moves as possible, then // 4, 2, or 1 byte(s) as remaining. This will // work and be efficient for power8 or later. // If there are 64 or more bytes, then a // loop is generated to move 32 bytes and // update the src and dst addresses on each
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 55.4K bytes - Viewed (0) -
src/cmd/internal/testdir/testdir_test.go
"loong64": {}, "mips": {"GOMIPS", "hardfloat", "softfloat"}, "mips64": {"GOMIPS64", "hardfloat", "softfloat"}, "ppc64": {"GOPPC64", "power8", "power9", "power10"}, "ppc64le": {"GOPPC64", "power8", "power9", "power10"}, "ppc64x": {}, // A pseudo-arch representing both ppc64 and ppc64le "s390x": {}, "wasm": {}, "riscv64": {"GORISCV64", "rva20u64", "rva22u64"}, } )
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 21 20:08:06 UTC 2024 - 57.5K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
// Hex constant 0x20004000000 MOVD $2199090364416, R5 // 60058001 // Hex constant 0xFFFFFE0004000000 MOVD $-2198956146688, R5 // 38a08001 // TODO: On GOPPC64={power8,power9}, this is preprocessed into MOVD $-1, R5; RLDC R5, $33, $63, R5. // This only captures the MOVD. Should the RLDC be appended to the encoding by the test? // Hex constant 0xFFFFFFFE00000001
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 50.2K bytes - Viewed (0) -
src/cmd/dist/build.go
} if goarch == "ppc64" || goarch == "ppc64le" { // We treat each powerpc version as a superset of functionality. switch goppc64 { case "power10": asmArgs = append(asmArgs, "-D", "GOPPC64_power10") fallthrough case "power9": asmArgs = append(asmArgs, "-D", "GOPPC64_power9") fallthrough default: // This should always be power8. asmArgs = append(asmArgs, "-D", "GOPPC64_power8") } }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 20 18:34:40 UTC 2024 - 54K bytes - Viewed (0) -
android/guava/src/com/google/common/collect/Sets.java
* is merely copied. Only as the power set is iterated are the individual subsets created, and * these subsets themselves occupy only a small constant amount of memory. * * @param set the set of elements to construct a power set from * @return the power set, as an immutable set of immutable sets
Registered: Wed Jun 12 16:38:11 UTC 2024 - Last Modified: Sun Jun 02 13:36:19 UTC 2024 - 77.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite.go
} func isPowerOfTwo64(n int64) bool { return n > 0 && n&(n-1) == 0 } // isUint64PowerOfTwo reports whether uint64(n) is a power of 2. func isUint64PowerOfTwo(in int64) bool { n := uint64(in) return n > 0 && n&(n-1) == 0 } // isUint32PowerOfTwo reports whether uint32(n) is a power of 2. func isUint32PowerOfTwo(in int64) bool { n := uint64(uint32(in)) return n > 0 && n&(n-1) == 0 }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 64.2K bytes - Viewed (0) -
guava/src/com/google/common/collect/Sets.java
* is merely copied. Only as the power set is iterated are the individual subsets created, and * these subsets themselves occupy only a small constant amount of memory. * * @param set the set of elements to construct a power set from * @return the power set, as an immutable set of immutable sets
Registered: Wed Jun 12 16:38:11 UTC 2024 - Last Modified: Mon Apr 01 16:15:01 UTC 2024 - 78.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/lower_tf.cc
auto axis = rewriter.create<ConstOp>( loc, GetScalarOfType(rewriter.getIntegerType(64), 0)); return rewriter.create<ConcatV2Op>(loc, type, ValueRange(vals), axis); } // Lowers AddN op to a sequence of AddV2 ops to accumulate operands. // // Note that to improve the parallelism, AddN op uses tree-based reduction. // For example, tf.AddN([0, 1, 2, 3, 4]) behaves as follows: //
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 74.9K bytes - Viewed (0) -
src/runtime/malloc.go
// and verified to be a power of two. // // If set, this must be set by the OS init code (typically in osinit) before // mallocinit. However, setting it at all is optional, and leaving the default // value is always safe (though potentially less efficient). // // Since physHugePageSize is always assumed to be a power of two,
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 29 17:58:53 UTC 2024 - 59.6K bytes - Viewed (0)