"application/vnd.ms-word.template.macroenabled.12",
				"application/vnd.ms-works",
				"application/vnd.ms-wpl",
				"application/vnd.ms-xpsdocument",
				"application/vnd.mseq",
				"application/vnd.msign",
				"application/vnd.multiad.creator",
				"application/vnd.multiad.creator.cif",
				"application/vnd.music-niff",
				"application/vnd.musician",
				"application/vnd.muvee.style",

sign.input 9d61b19deffd5a60ba84:d75a980182b10ab7d54b::e5564300c360ac729086: 4ccd089b28ff96da9db6:3d4017c3e843895a92b7:72:92a009a9f0d4cab8720e: c5aa8df43f9f837bedb7:fc51cd8e6218a1a38da4:af82:6291d657deec24024827: 0d4a05b07352a5436e18:e61a185bcef2613a6c7c:cbc77b:d9868d52c2bebce5f3fa: 6df9340c138cc188b5fe:c0dac102c4533186e25d:5f4c8989:124f6fc6b0d100842769: b780381a65edf8b78f69:e253af0766804b869bb1:18b6bec097:b2fc46ad47af464478c1: 78ae9effe6f245e924a7:fbcfbfa40505d7f2be44:89010d855972:6ed629fc1d9ce9e14687:...

	// Format monotonic clock reading as m=±ddd.nnnnnnnnn.
	if t.wall&hasMonotonic != 0 {
		m2 := uint64(t.ext)
		sign := byte('+')
		if t.ext < 0 {
			sign = '-'
			m2 = -m2
		}
		m1, m2 := m2/1e9, m2%1e9
		m0, m1 := m1/1e9, m1%1e9
		buf := make([]byte, 0, 24)
		buf = append(buf, " m="...)
		buf = append(buf, sign)
		wid := 0
		if m0 != 0 {
			buf = appendInt(buf, int(m0), 0)
			wid = 9
		}

}

func TestFloatPredicates(t *testing.T) {
	for _, test := range []struct {
		x            string
		sign         int
		signbit, inf bool
	}{
		{x: "-Inf", sign: -1, signbit: true, inf: true},
		{x: "-1", sign: -1, signbit: true},
		{x: "-0", signbit: true},
		{x: "0"},
		{x: "1", sign: 1},
		{x: "+Inf", sign: 1, inf: true},
	} {
		x := makeFloat(test.x)
		if got := x.Signbit(); got != test.signbit {

		// Switch to negation.
		case '-':
			if sign < 0 {
				break Loop
			}
			sign = -1
			// Invert flags so that | above turn into &^ and vice versa.
			// We'll invert flags again before using it below.
			flags = ^flags
			sawFlag = false

		// End of flags, starting group or not.
		case ':', ')':
			if sign < 0 {
				if !sawFlag {
					break Loop
				}

		{name: "LNDFR", argLength: 1, reg: fp11, asm: "LNDFR"},                                                                       // fp64/fp32 clear sign bit
		{name: "CPSDR", argLength: 2, reg: fp21, asm: "CPSDR"},                                                                       // fp64/fp32 copy arg1 sign bit to arg0

		// Round to integer, float64 only.
		//

Method <org.gradle.plugins.signing.Sign.getSignatures()> does not have raw return type assignable to org.gradle.api.provider.Provider in (Sign.java:0)
Method <org.gradle.plugins.signing.Sign.getSignaturesByKey()> does not have raw return type assignable to org.gradle.api.provider.Provider in (Sign.java:0)
Method <org.gradle.plugins.signing.Sign.getSingleSignature()> does not have raw return type assignable to org.gradle.api.provider.Provider in (Sign.java:0)

// Note: when removing unnecessary sign/zero extensions.
//
// After a value is spilled it is restored using a sign- or zero-extension
// to register-width as appropriate for its type. For example, a uint8 will
// be restored using a MOVBZ (llgc) instruction which will zero extend the
// 8-bit value to 64-bits.
//
// This is a hazard when folding sign- and zero-extensions since we need to

        given:
        terseConsoleOutput(false)
        javaLibrary()
        uncheckedModule("org", "foo", "1.0") {
            artifact(classifier: 'classy')
            withSignature {
                keyring.sign(it)
            }
        }
        buildFile << """
            dependencies {
                implementation "org:foo:1.0:classy"
            }
        """

        expect:

		{name: "SBFIZ", argLength: 1, reg: gp11, asm: "SBFIZ", aux: "ARM64BitField"},
		// extract width bits of arg0 starting at bit lsb and insert at low end of result, remaining high bits are set to the high/sign bit of the extracted bitfield