- Sort Score
- Result 10 results
- Languages All
Results 1 - 3 of 3 for guarantees (0.03 sec)
-
tensorflow/c/c_api.h
// ncontrol_outputs: Number of control outputs of the function. // control_outputs: vector of TF_Operation objects to be marked as control // outputs of the function. Operations marked as control outputs are // guaranteed to execute. // control_output_names: Optional. If not nullptr, vector of strings, one // per control output, with their names to be added to the function's // OpDef.
Registered: Tue Sep 09 12:39:10 UTC 2025 - Last Modified: Thu Oct 26 21:08:15 UTC 2023 - 82.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
// license that can be found in the LICENSE file. // This input was created by taking the instruction productions in // the old assembler's (7a's) grammar and hand-writing complete // instructions for each rule, to guarantee we cover the same space. #include "../../../../../runtime/textflag.h" TEXT foo(SB), DUPOK|NOSPLIT, $-8 // arithmetic operations ADDW $1, R2, R3 ADDW R1, R2, R3 ADDW R1, ZR, R3 ADD $1, R2, R3
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Mar 26 10:48:50 UTC 2025 - 95.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm.s
// license that can be found in the LICENSE file. // This input was created by taking the instruction productions in // the old assembler's (5a's) grammar and hand-writing complete // instructions for each rule, to guarantee we cover the same space. #include "../../../../../runtime/textflag.h" TEXT foo(SB), DUPOK|NOSPLIT, $0 // ADD // // LTYPE1 cond imsr ',' spreg ',' reg // { // outcode($1, $2, &$3, $5, &$7); // }
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Fri Dec 15 20:51:01 UTC 2023 - 69K bytes - Viewed (0)