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tensorflow/compiler/mlir/lite/tests/prepare-tf.mlir
func.func @add_v2_uint32(%arg0: tensor<ui32>, %arg1: tensor<ui32>) -> tensor<ui32> { %0 = "tf.AddV2"(%arg0, %arg1) : (tensor<ui32>, tensor<ui32>) -> tensor<ui32> func.return %0 : tensor<ui32> // CHECK-LABEL: add_v2_uint32 // CHECK: %[[CAST:.*]] = "tf.Cast"(%arg0) <{Truncate = false}> : (tensor<ui32>) -> tensor<i32> // CHECK: %[[CAST1:.*]] = "tf.Cast"(%arg1) <{Truncate = false}> : (tensor<ui32>) -> tensor<i32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 29 07:26:59 UTC 2024 - 59.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_ops.td
TF_DerivedResultTypeAttr dtype = TF_DerivedResultTypeAttr<0>; } // TODO(lyandy): Investigate supported dtypes (`minval`, `maxval`, `output`) for // `tf.StatefulUniformInt`. tf2xla kernels support i32, i64, ui32, and ui64 // while TensorFlow CPU/GPU kernels only support i32 and i64. def TF_StatefulUniformIntOp : TF_Op<"StatefulUniformInt", []> { let summary = "Outputs random integers from a uniform distribution.";
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Apr 24 04:08:35 UTC 2024 - 90.5K bytes - Viewed (0)