// For DCBT Ra,Rb,TH, A value of TH indicates:
//     0, hint this cache line will be used soon. (PrefetchCache)
//     16, hint this cache line will not be used for long. (PrefetchCacheStreamed)
// See ISA 3.0 Book II 4.3.2 for more detail. https://openpower.foundation/specifications/isa/
(PrefetchCache ptr mem)          => (DCBT ptr mem [0])
(PrefetchCacheStreamed ptr mem)  => (DCBT ptr mem [16])

	&& sz >= 0
	&& isSameCall(sym, "runtime.memmove")
	&& call.Uses == 1
	&& isInlinableMemmove(dst, src, sz, config)
	&& clobber(call)
	=> (Move [sz] dst src mem)

// Prefetch instructions
(PrefetchCache ...)   => (PrefetchT0 ...)
(PrefetchCacheStreamed ...) => (PrefetchNTA ...)

// CPUID feature: BMI1.
(AND(Q|L) x (NOT(Q|L) y))               && buildcfg.GOAMD64 >= 3 => (ANDN(Q|L) x y)