ADC	R0->28, R1           // 401ea1e0
	ADC	R0@>28, R1           // 601ea1e0
	ADC.S	R0<<28, R1           // 001eb1e0
	ADC.S	R0>>28, R1           // 201eb1e0
	ADC.S	R0->28, R1           // 401eb1e0
	ADC.S	R0@>28, R1           // 601eb1e0
	ADC	R0<<R1, R2, R3       // 1031a2e0
	ADC	R0>>R1, R2, R3       // 3031a2e0
	ADC	R0->R1, R2, R3       // 5031a2e0
	ADC	R0@>R1, R2, R3       // 7031a2e0

(ADD x (SRA y z)) => (ADDshiftRAreg x y z)
(ADC x (SLLconst [c] y) flags) => (ADCshiftLL x y [c] flags)
(ADC x (SRLconst [c] y) flags) => (ADCshiftRL x y [c] flags)
(ADC x (SRAconst [c] y) flags) => (ADCshiftRA x y [c] flags)
(ADC x (SLL y z) flags) => (ADCshiftLLreg x y z flags)
(ADC x (SRL y z) flags) => (ADCshiftRLreg x y z flags)
(ADC x (SRA y z) flags) => (ADCshiftRAreg x y z flags)

		var as2 obj.As
		switch p.As {
		case AADD, ASUB, AORR, AEOR, ABIC:
			as2 = p.As // ADD, SUB, ORR, EOR, BIC
		case ARSB:
			as2 = AADD // RSB -> RSB/ADD pair
		case AADC:
			as2 = AADD // ADC -> ADC/ADD pair
		case ASBC:
			as2 = ASUB // SBC -> SBC/SUB pair
		case ARSC:
			as2 = AADD // RSC -> RSC/ADD pair
		default:
			c.ctxt.Diag("unknown second op for %v", p)
		}

		// binary ops
		{name: "ADCSflags", argLength: 3, reg: gp2flags1flags, typ: "(UInt64,Flags)", asm: "ADCS", commutative: true}, // arg0+arg1+carry, set flags.
		{name: "ADCzerocarry", argLength: 1, reg: gp0flags1, typ: "UInt64", asm: "ADC"},                               // ZR+ZR+carry
		{name: "ADD", argLength: 2, reg: gp21, asm: "ADD", commutative: true},                                         // arg0 + arg1

	CLS	R1, R2
	SBC	$0, R1                           // 21001fda
	SBCW	$0, R1                           // 21001f5a
	SBCS	$0, R1                           // 21001ffa
	SBCSW	$0, R1                           // 21001f7a
	ADC	$0, R1                           // 21001f9a
	ADCW	$0, R1                           // 21001f1a
	ADCS	$0, R1                           // 21001fba
	ADCSW	$0, R1                           // 21001f3a