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Results 1 - 7 of 7 for intconst (0.12 sec)
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src/cmd/compile/internal/ssa/_gen/PPC64.rules
(AND x (MOVDconst [c])) && isU16Bit(c) => (ANDconst [c] x) (XOR x (MOVDconst [c])) && isU32Bit(c) => (XORconst [c] x) (OR x (MOVDconst [c])) && isU32Bit(c) => (ORconst [c] x) // Simplify consts (ANDconst [c] (ANDconst [d] x)) => (ANDconst [c&d] x) (ORconst [c] (ORconst [d] x)) => (ORconst [c|d] x) (XORconst [c] (XORconst [d] x)) => (XORconst [c^d] x) (ANDconst [-1] x) => x (ANDconst [0] _) => (MOVDconst [0]) (XORconst [0] x) => x
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0) -
src/cmd/cgo/gcc.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 20 15:50:06 UTC 2024 - 97K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite.go
// and return mask & m. func mergePPC64RShiftMask(m, s, nbits int64) int64 { smask := uint64((1<<uint(nbits))-1) >> uint(s) return m & int64(smask) } // Combine (ANDconst [m] (SRWconst [s])) into (RLWINM [y]) or return 0 func mergePPC64AndSrwi(m, s int64) int64 { mask := mergePPC64RShiftMask(m, s, 32) if !isPPC64WordRotateMask(mask) { return 0 }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 64.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
{name: "FDIVD", argLength: 2, reg: fp21, asm: "FDIVD"}, // arg0 / arg1 {name: "AND", argLength: 2, reg: gp21, asm: "AND", commutative: true}, // arg0 & arg1 {name: "ANDconst", argLength: 1, reg: gp11, asm: "AND", aux: "Int64"}, // arg0 & auxInt {name: "OR", argLength: 2, reg: gp21, asm: "ORR", commutative: true}, // arg0 | arg1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/go/types/expr.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 29 02:09:54 UTC 2024 - 49.7K bytes - Viewed (0) -
src/cmd/compile/internal/types2/expr.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 29 02:09:54 UTC 2024 - 51.7K bytes - Viewed (0) -
src/cmd/compile/internal/ppc64/ssa.go
p.AddRestSourceReg(ppc64.REG_R0) } // AuxInt values 4,5,6 implemented with reverse operand order from 0,1,2 if v.AuxInt > 3 { p.Reg, p.GetFrom3().Reg = p.GetFrom3().Reg, p.Reg } p.From.SetConst(v.AuxInt & 3) case ssa.OpPPC64SETBC, ssa.OpPPC64SETBCR: p := s.Prog(v.Op.Asm()) p.To.Type = obj.TYPE_REG p.To.Reg = v.Reg() p.From.Type = obj.TYPE_REG
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 55.4K bytes - Viewed (0)