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Results 1 - 10 of 13 for i32 (0.2 sec)

  1. tensorflow/compiler/mlir/tfrt/tests/mlrt/while_to_map_fn.mlir

      %outputs_22 =  "tf.Const"() {device = "", value = dense<16> : tensor<i32>} : () -> tensor<i32>
      %outputs_24 =  "tf.Const"() {device = "", value = dense<0> : tensor<i32>} : () -> tensor<i32>
      %outputs_26 =  "tf.Range"(%outputs_24, %outputs_22, %outputs_20) {device = ""} : (tensor<i32>, tensor<i32>, tensor<i32>) -> tensor<*xi32>
      // CHECK: [[read_only_tensor_list:%.*]] = "tf.TensorListFromTensor"
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Apr 23 06:40:22 UTC 2024
    - 68.6K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/experimental/tac/tests/raise-target-subgraphs.mlir

      %0 = "tfl.while"(%arg0) ({
      ^bb0(%block: tensor<i32>):
        %1 = "tfl.add"(%arg0, %arg0) { fused_activation_function = "NONE", tac.device = "CPU", tac.inference_type = "FLOAT"} : (tensor<i32>, tensor<i32>) -> (tensor<i32>)
        %2 = "tfl.add"(%1, %1) { fused_activation_function = "NONE", tac.device = "GPU", tac.inference_type = "FLOAT"} : (tensor<i32>, tensor<i32>) -> (tensor<i32>)
        "tfl.yield"(%2) : (tensor<i32>) -> ()
      },{
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 74.9K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/lite/tests/prepare-quantize.mlir

          name = "avgpool", filter_height = 3 : i32, filter_width = 6 : i32, fused_activation_function = "NONE", padding = "VALID", stride_h = 3 : i32, stride_w = 1 : i32
        } : (tensor<1x224x224x3xf32>) -> tensor<1x224x224x3xf32>
      %6 = "tfl.conv_2d"(%5, %4, %cst) {
          dilation_h_factor = 1 : i32, dilation_w_factor = 1 : i32, fused_activation_function = "NONE", padding = "SAME", stride_h = 2 : i32, stride_w = 2 : i32
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 67.5K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/quantize_composite_functions.mlir

    // CHECK: %[[ADD_0:.+]] = stablehlo.add %[[DOT_GENERAL_0]], %[[DYNAMIC_BROADCAST_IN_DIM_0]] : tensor<?x3x!quant.uniform<i32:f32:1, {{.*}}>>
    // CHECK: %[[UNIFORM_QUANTIZE_1:.+]] = stablehlo.uniform_quantize %[[ADD_0]] : (tensor<?x3x!quant.uniform<i32:f32:1, {{.*}}>>)
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 09 05:56:10 UTC 2024
    - 91.6K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tensorflow/tests/tpu_cluster_formation.mlir

      %2 = "tf.opC"() {is_stateless = true} : () -> tensor<f32>
      %3 = "tf.opD"(%ri_0, %ri_1, %arg2, %2) {_xla_compile_device_type = "TPU", _replication_info = "replicate", is_stateless = true} : (tensor<i1>, tensor<i32>, tensor<f32>, tensor<f32>) -> tensor<i32>
      %ro_0:2 = "tf.TPUReplicatedOutput"(%3) : (tensor<i32>) -> (tensor<i32>, tensor<i32>)
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 22:03:30 UTC 2024
    - 53.9K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/tensorflow/tests/decompose_resource_ops.mlir

        // CHECK: %[[RES_READ_VAL:[0-9]*]] = "tf.ReadVariableOp"
        // CHECK: "tf.Sub"(%[[RES_READ_VAL]], %[[ONE]])
        // CHECK: "tf.AssignVariableOp"
    
        %1 = "tf.Const"() {value = dense<1> : tensor<i32>} : () -> tensor<i32>
        "tf.AssignSubVariableOp"(%0, %1) {dtype = "tfdtype$DT_INT32"} : (tensor<!tf_type.resource<tensor<i32>>>, tensor<i32>) -> ()
    
        tf_device.return
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 22 19:47:48 UTC 2024
    - 51.3K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/tests/prepare-tf.mlir

      // CHECK:  %[[CAST:.*]] = "tf.Cast"(%arg0) <{Truncate = false}> : (tensor<ui32>) -> tensor<i32>
      // CHECK:  %[[CAST1:.*]] = "tf.Cast"(%arg1) <{Truncate = false}> : (tensor<ui32>) -> tensor<i32>
      // CHECK:  %[[ADD:.*]] = "tf.AddV2"(%[[CAST]], %[[CAST1]]) : (tensor<i32>, tensor<i32>) -> tensor<i32>
      // CHECK:  %[[CAST2:.*]] = "tf.Cast"(%[[ADD]]) <{Truncate = false}> : (tensor<i32>) -> tensor<ui32>
      // CHECK:  return %[[CAST2]] : tensor<ui32>
    }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 29 07:26:59 UTC 2024
    - 59.8K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/lite/tests/prepare-quantize-post-training.mlir

    // CHECK-DAG: %[[input_12:.*]] = "tfl.dequantize"({{.*}}) : (tensor<2x!quant.uniform<i32:f32, 1.1776238018224695E-4>>) -> tensor<2xf32>
    // CHECK-DAG: %[[input_13:.*]] = "tfl.dequantize"({{.*}}) : (tensor<2x!quant.uniform<i32:f32, 1.9420648637759368E-4>>) -> tensor<2xf32>
    // CHECK-DAG: %[[input_14:.*]] = "tfl.dequantize"({{.*}}) : (tensor<2x!quant.uniform<i32:f32, 1.1827185827747504E-4>>) -> tensor<2xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 52.6K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/lite/stablehlo/transforms/compose_uniform_quantized_type_pass.cc

    // %13 = stablehlo.convert %11  // i8->i32 cast for q1.
    // %14 = stablehlo.convert %3  // [Optional] i8->i32 cast for z1.
    // %15 = stablehlo.broadcast_in_dim %14  // Operand = %4 if no `convert` above.
    // %16 = stablehlo.subtract %13, %15  // q1 - z1
    // %17 = stablehlo.convert %12  // i8->i32 cast for q2.
    // %18 = stablehlo.convert %6  // [Optional] i8->i32 cast for z2.
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 64.6K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/tensorflow/transforms/lower_tf.cc

    //   %start = "tf.Const"() {value = dense<0> : tensor<i32>}
    //   %limit = "tf.Const"() {value = dense<5> : tensor<i32>}
    //   %delta = "tf.Const"() {value = dense<1> : tensor<i32>}
    //   %updates = "tf.Range"(%start, %limit, %delta) :
    //     (tensor<i32>, tensor<i32>, tensor<i32>) -> tensor<5xi32>
    //   %shape = "tf.Const"() {value = dense<[5, 1]> : tensor<2xi32>}
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 74.9K bytes
    - Viewed (0)
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