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Results 1 - 10 of 15 for movbeq (0.21 sec)
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src/cmd/asm/internal/asm/testdata/arm.s
MOVBS 0x00ffffff(R2), R1 // MOVBS 16777215(R2), R1 MOVBS.P 0x00ffffff(R2), R1 // MOVBS.P 16777215(R2), R1 MOVBS.W 0x00ffffff(R2), R1 // MOVBS.W 16777215(R2), R1 MOVBS -0x00ffffff(R2), R1 // MOVBS -16777215(R2), R1 MOVBS.P -0x00ffffff(R2), R1 // MOVBS.P -16777215(R2), R1 MOVBS.W -0x00ffffff(R2), R1 // MOVBS.W -16777215(R2), R1 MOVBU R1, 0x00ffffff(R2) // MOVBU R1, 16777215(R2)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 15 20:51:01 UTC 2023 - 69K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
MOVHZU (R3), R5 // a4a30000 MOVBU 1(R3), R4 // 8c8300017c840774 MOVBU (R3)(R4), R5 // 7ca418ee7ca50774 MOVBU (R3)(R0), R5 // 7ca018ee7ca50774 MOVBU (R3), R5 // 8ca300007ca50774 MOVBZU 1(R3), R4 // 8c830001 MOVBZU (R3)(R4), R5 // 7ca418ee MOVBZU (R3)(R0), R5 // 7ca018ee MOVBZU (R3), R5 // 8ca30000
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 50.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390X.rules
// Lowering moves // Load and store for small copies. (Move [0] _ _ mem) => mem (Move [1] dst src mem) => (MOVBstore dst (MOVBZload src mem) mem) (Move [2] dst src mem) => (MOVHstore dst (MOVHZload src mem) mem) (Move [4] dst src mem) => (MOVWstore dst (MOVWZload src mem) mem) (Move [8] dst src mem) => (MOVDstore dst (MOVDload src mem) mem) (Move [16] dst src mem) =>
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 12 18:09:26 UTC 2023 - 74.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64.rules
(MOVQstore dst (MOVQload src mem) mem)) (Move [32] dst src mem) => (Move [16] (OffPtr <dst.Type> dst [16]) (OffPtr <src.Type> src [16]) (Move [16] dst src mem)) (Move [48] dst src mem) && config.useSSE => (Move [32] (OffPtr <dst.Type> dst [16]) (OffPtr <src.Type> src [16]) (Move [16] dst src mem)) (Move [64] dst src mem) && config.useSSE => (Move [32] (OffPtr <dst.Type> dst [32])
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0) -
src/crypto/internal/nistec/p256_asm_s390x.s
// clobbers T1H and T1L MOVD $0, ISZERO MOVD $1, TRUE VZERO ZER VO HL, HH, T1H VCEQGS ZER, T1H, T1H MOVDEQ TRUE, ISZERO VX HL, PL, T1L VX HH, PH, T1H VO T1L, T1H, T1H VCEQGS ZER, T1H, T1H MOVDEQ TRUE, ISZERO MOVD ISZERO, ret+24(FP) // X=Z1; Y=Z2; MUL; T- // Z3 = Z1*Z2 VL 80(P1ptr), X1 // Z1H VPDI $0x4, X1, X1, X1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 55.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/merge_control_flow.mlir
"tf.E"(%2) : (tensor<i32>) -> () tf_device.return }) {cluster_attr = "cluster_attr"} : () -> () func.return } // Checks that results from first IfRegion are moved after merged IfRegion op as needed. // CHECK-LABEL: func @same_predicate_results_moved func.func @same_predicate_results_moved(%arg0: tensor<!tf_type.resource<tensor<f32>>>) { // CHECK: tf_device.cluster
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 63.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM.rules
(MOVWconst [0]) mem) // moves (Move [0] _ _ mem) => mem (Move [1] dst src mem) => (MOVBstore dst (MOVBUload src mem) mem) (Move [2] {t} dst src mem) && t.Alignment()%2 == 0 => (MOVHstore dst (MOVHUload src mem) mem) (Move [2] dst src mem) => (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem)) (Move [4] {t} dst src mem) && t.Alignment()%4 == 0 =>
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 90.1K bytes - Viewed (0) -
src/runtime/mgcmark.go
// we're not capturing anything from the user stack, since the user // stack may move while we're in this function. // // gcAssistAlloc1 indicates whether this assist completed the mark // phase by setting gp.param to non-nil. This can't be communicated on // the stack since it may move. // //go:systemstack func gcAssistAlloc1(gp *g, scanWork int64) {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Apr 18 21:25:11 UTC 2024 - 52.5K bytes - Viewed (0) -
src/runtime/asm_amd64.s
TEXT ·spillArgs(SB),NOSPLIT,$0-0 MOVQ AX, 0(R12) MOVQ BX, 8(R12) MOVQ CX, 16(R12) MOVQ DI, 24(R12) MOVQ SI, 32(R12) MOVQ R8, 40(R12) MOVQ R9, 48(R12) MOVQ R10, 56(R12) MOVQ R11, 64(R12) MOVQ X0, 72(R12) MOVQ X1, 80(R12) MOVQ X2, 88(R12) MOVQ X3, 96(R12) MOVQ X4, 104(R12) MOVQ X5, 112(R12) MOVQ X6, 120(R12) MOVQ X7, 128(R12) MOVQ X8, 136(R12) MOVQ X9, 144(R12) MOVQ X10, 152(R12)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 11 20:38:24 UTC 2024 - 60.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/debug.go
} // A VarLoc describes the storage for part of a user variable. type VarLoc struct { // The registers this variable is available in. There can be more than // one in various situations, e.g. it's being moved between registers. Registers RegisterSet StackOffset } func (loc VarLoc) absent() bool { return loc.Registers == 0 && !loc.onStack() } func (loc VarLoc) intersect(other VarLoc) VarLoc {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jun 10 19:44:43 UTC 2024 - 58.4K bytes - Viewed (0)