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Results 1 - 10 of 28 for move (0.07 sec)

  1. src/cmd/compile/internal/ssa/_gen/AMD64.rules

    		(MOVQstore dst (MOVQload src mem) mem))
    
    (Move [32] dst src mem) =>
    	(Move [16]
    		(OffPtr <dst.Type> dst [16])
    		(OffPtr <src.Type> src [16])
    		(Move [16] dst src mem))
    
    (Move [48] dst src mem) && config.useSSE =>
    	(Move [32]
    		(OffPtr <dst.Type> dst [16])
    		(OffPtr <src.Type> src [16])
    		(Move [16] dst src mem))
    
    (Move [64] dst src mem) && config.useSSE =>
    	(Move [32]
    		(OffPtr <dst.Type> dst [32])
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 93.9K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/S390X.rules

    (MOV(B|BZ)reg e:(MOVWreg x)) && clobberIfDead(e) => (MOV(B|BZ)reg x)
    (MOV(H|HZ)reg e:(MOVHreg x)) && clobberIfDead(e) => (MOV(H|HZ)reg x)
    (MOV(H|HZ)reg e:(MOVWreg x)) && clobberIfDead(e) => (MOV(H|HZ)reg x)
    (MOV(W|WZ)reg e:(MOVWreg x)) && clobberIfDead(e) => (MOV(W|WZ)reg x)
    
    // Bypass redundant zero extensions.
    (MOV(B|BZ)reg e:(MOVBZreg x)) && clobberIfDead(e) => (MOV(B|BZ)reg x)
    (MOV(B|BZ)reg e:(MOVHZreg x)) && clobberIfDead(e) => (MOV(B|BZ)reg x)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 12 18:09:26 UTC 2023
    - 74.3K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/regalloc.go

    	cr := e.contents[loc]
    	if cr.c == nil {
    		return
    	}
    	vid := cr.vid
    
    	if cr.final {
    		// Add a destination to move this value back into place.
    		// Make sure it gets added to the tail of the destination queue
    		// so we make progress on other moves first.
    		e.extra = append(e.extra, dstRecord{loc, cr.vid, nil, cr.pos})
    	}
    
    	// Remove c from the list of cached values.
    	a := e.cache[vid]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 17:49:56 UTC 2023
    - 87.2K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/ARM.rules

    		(MOVWconst [0])
    		mem)
    
    // moves
    (Move [0] _ _ mem) => mem
    (Move [1] dst src mem) => (MOVBstore dst (MOVBUload src mem) mem)
    (Move [2] {t} dst src mem) && t.Alignment()%2 == 0 =>
    	(MOVHstore dst (MOVHUload src mem) mem)
    (Move [2] dst src mem) =>
    	(MOVBstore [1] dst (MOVBUload [1] src mem)
    		(MOVBstore dst (MOVBUload src mem) mem))
    (Move [4] {t} dst src mem) && t.Alignment()%4 == 0 =>
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 90.1K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/PPC64.rules

    // moves
    (Move [0] _ _ mem) => mem
    (Move [1] dst src mem) => (MOVBstore dst (MOVBZload src mem) mem)
    (Move [2] dst src mem) =>
            (MOVHstore dst (MOVHZload src mem) mem)
    (Move [4] dst src mem) =>
    	(MOVWstore dst (MOVWZload src mem) mem)
    // MOVD for load and store must have offsets that are multiple of 4
    (Move [8] {t} dst src mem) =>
    	(MOVDstore dst (MOVDload src mem) mem)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 53.2K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ppc64/ssa.go

    		// many as needed, using the appropriate offset value.
    		//	MOVD  n(R21),R31
    		//	MOVD  R31,n(R20)
    		//	MOVW  n1(R21),R31
    		//	MOVW  R31,n1(R20)
    		//	MOVH  n2(R21),R31
    		//	MOVH  R31,n2(R20)
    		//	MOVB  n3(R21),R31
    		//	MOVB  R31,n3(R20)
    
    		// Each loop iteration moves 32 bytes
    		ctr := v.AuxInt / bytesPerLoop
    
    		// Remainder after the loop
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 55.4K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/_gen/ARM64Ops.go

    		// conversions
    		{name: "MOVBreg", argLength: 1, reg: gp11, asm: "MOVB"},   // move from arg0, sign-extended from byte
    		{name: "MOVBUreg", argLength: 1, reg: gp11, asm: "MOVBU"}, // move from arg0, unsign-extended from byte
    		{name: "MOVHreg", argLength: 1, reg: gp11, asm: "MOVH"},   // move from arg0, sign-extended from half
    		{name: "MOVHUreg", argLength: 1, reg: gp11, asm: "MOVHU"}, // move from arg0, unsign-extended from half
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 58.8K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/rewrite.go

    }
    
    // isInlinableMemmove reports whether the given arch performs a Move of the given size
    // faster than memmove. It will only return true if replacing the memmove with a Move is
    // safe, either because Move will do all of its loads before any of its stores, or
    // because the arguments are known to be disjoint.
    // This is used as a check for replacing memmove with Move ops.
    func isInlinableMemmove(dst, src *Value, sz int64, c *Config) bool {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 64.2K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/_gen/S390XOps.go

    		{name: "MOVDconst", reg: gp01, asm: "MOVD", typ: "UInt64", aux: "Int64", rematerializeable: true}, // auxint
    
    		{name: "LDGR", argLength: 1, reg: gpfp, asm: "LDGR"}, // move int64 to float64 (no conversion)
    		{name: "LGDR", argLength: 1, reg: fpgp, asm: "LGDR"}, // move float64 to int64 (no conversion)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 24 00:21:13 UTC 2023
    - 52.5K bytes
    - Viewed (0)
  10. src/cmd/asm/internal/asm/testdata/ppc64.s

    	MOVD $-32767, R5                // 38a08001
    	MOVD $-32768, R6                // 38c08000
    	MOVD $1234567, R5               // 6405001260a5d687 or 0600001238a0d687
    	MOVW $1, R3                     // 38600001
    	MOVW $-1, R4                    // 3880ffff
    	MOVW $65535, R5                 // 6005ffff
    	MOVW $65536, R6                 // 3cc00001
    	MOVW $-32767, R5                // 38a08001
    	MOVW $-32768, R6                // 38c08000
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 21:53:50 UTC 2024
    - 50.2K bytes
    - Viewed (0)
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