/*13163*/ uint16(xCondDataSize), 13167, 13171, 0,
	/*13167*/ uint16(xSetOp), uint16(IMUL),
	/*13169*/ uint16(xArgRM16),
	/*13170*/ uint16(xMatch),
	/*13171*/ uint16(xSetOp), uint16(IMUL),
	/*13173*/ uint16(xArgRM32),
	/*13174*/ uint16(xMatch),
	/*13175*/ uint16(xCondDataSize), 13167, 13171, 13179,
	/*13179*/ uint16(xSetOp), uint16(IMUL),
	/*13181*/ uint16(xArgRM64),
	/*13182*/ uint16(xMatch),

	DENBCDQ:        "denbcdq",
	DENBCDQCC:      "denbcdq.",
	DIEX:           "diex",
	DIEXCC:         "diex.",
	DIEXQCC:        "diexq.",
	DIEXQ:          "diexq",
	DMUL:           "dmul",
	DMULCC:         "dmul.",
	DMULQ:          "dmulq",
	DMULQCC:        "dmulq.",
	DQUA:           "dqua",
	DQUACC:         "dqua.",
	DQUAI:          "dquai",
	DQUAICC:        "dquai.",

	{ir.OMUL, types.TINT8}:    ssa.OpMul8,
	{ir.OMUL, types.TUINT8}:   ssa.OpMul8,
	{ir.OMUL, types.TINT16}:   ssa.OpMul16,
	{ir.OMUL, types.TUINT16}:  ssa.OpMul16,
	{ir.OMUL, types.TINT32}:   ssa.OpMul32,
	{ir.OMUL, types.TUINT32}:  ssa.OpMul32,
	{ir.OMUL, types.TINT64}:   ssa.OpMul64,
	{ir.OMUL, types.TUINT64}:  ssa.OpMul64,
	{ir.OMUL, types.TFLOAT32}: ssa.OpMul32F,

  // CHECK-NEXT: %[[mul:.*]] = mhlo.multiply %[[grad]], %[[sub]] : tensor<8x8x8x8xf32>
  // CHECK-NEXT: mhlo.constant dense<[0, 1, 2]> : tensor<3xi64>
  // CHECK-NEXT: %[[cmul:.*]] = mhlo.convert %[[mul]] : tensor<8x8x8x8xf32>
  // CHECK-NEXT: %[[init:.*]] = mhlo.constant dense<-0.000000e+00> : tensor<f32>

		v.AuxInt = float64ToAuxInt(math.Abs(x))
		return true
	}
	return false
}
func rewriteValuePPC64_OpPPC64FADD(v *Value) bool {
	v_1 := v.Args[1]
	v_0 := v.Args[0]
	// match: (FADD (FMUL x y) z)
	// cond: x.Block.Func.useFMA(v)
	// result: (FMADD x y z)
	for {
		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
			if v_0.Op != OpPPC64FMUL {
				continue
			}

		if v_0_1.Op != OpS390XMOVDconst {
			break
		}
		d := auxIntToInt64(v_0_1.AuxInt)
		v.reset(OpS390XMOVDconst)
		v.AuxInt = int64ToAuxInt(c - d)
		return true
	}
	// match: (Select0 (FADD (FMUL y z) x))
	// cond: x.Block.Func.useFMA(v)
	// result: (FMADD x y z)
	for {
		if v_0.Op != OpS390XFADD {
			break
		}
		_ = v_0.Args[1]
		v_0_0 := v_0.Args[0]
		v_0_1 := v_0.Args[1]

	UMULL_LE:          "UMULL.LE",
	UMULL:             "UMULL",
	UMULL_ZZ:          "UMULL.ZZ",
	UMULL_S_EQ:        "UMULL.S.EQ",
	UMULL_S_NE:        "UMULL.S.NE",
	UMULL_S_CS:        "UMULL.S.CS",
	UMULL_S_CC:        "UMULL.S.CC",
	UMULL_S_MI:        "UMULL.S.MI",
	UMULL_S_PL:        "UMULL.S.PL",
	UMULL_S_VS:        "UMULL.S.VS",
	UMULL_S_VC:        "UMULL.S.VC",
	UMULL_S_HI:        "UMULL.S.HI",